Here's a leaked track from Oakland vocalist Karyn Paige.

The 2012 Progressive Opportunities Conference showcased the best work of nonprofits, companies, unions, activists, and government leaders, looking to shed light on some of our most pressing economic issues. The Conference sought to create an opportunity to network and exchange ideas, arming attendees with new tools to make positive economic change.…

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The city's 911 system can leave callers waiting for more than 120 seconds before an operator ever answers. Seconds of delay in an emergency can lead to death. As a result, 911 calls are supposed to be answered quickly.…

A ceramic electronic component includes an interior part and an exterior part. The interior part includes an interior part dielectric layer and an internal electrode layer. The exterior part includes an exterior part dielectric layer. The exterior part is positioned outside the interior part along a laminating direction thereof. The interior part dielectric layer and the exterior part dielectric layer respectively contain barium titanate as a main component. β−α≧0.20 and α/β≦0.88 are satisfied, where α mol part and β mol part are respectively an amount of a rare earth element contained in the interior and exterior part dielectric layers, provided that an amount of barium titanate contained in the interior and exterior part dielectric layers is respectively 100 mol parts in terms of BaTiO3.

A ceramic electronic component includes a dielectric layer and an electrode layer. The dielectric layer contains a plurality of ceramic particles and grain boundary phases present therebetween. A main component of the ceramic particles is barium titanate. An average thickness of the grain boundary phases is 1.0 nm or more. A thickness variation σ of the grain boundary phases is 0.1 nm or less.

An electric circuit device connecting first and second external elements, the electric circuit device including: a first electronic component; a first bus bar electrically connected to the first electronic component; a second bus bar electrically connected to the electronic component and overlapped with the first bus bar in a direction perpendicular to main surfaces of the first and second bus bars; a first external terminal electrically connecting the first bus bar to the first external element; a second external terminal electrically connecting the second bus bar to the second external element; a first region in the first external terminal electrically coupled to the first external element; and a second region in the second external terminal electrically coupled to the second external element, and at least partially overlapped with the first region in the direction.

A multilayer ceramic electronic component includes a laminated body including dielectric layers and internal electrode layers, and first and second external electrodes. The laminated body further includes a first conductor layer, a first insulating coating layer, a second conductor layer, and a second insulating coating layer. The surface of the first conductor layer closer to a first end surface is partially connected to the first external electrode. The surface of the second conductor layer closer to a second end surface is partially connected to the second external electrode.

The present invention relates to a process for producing an electrolytic capacitor, the process comprising process steps i) ii): i) providing a capacitor body (1) that comprises an electrode body (2) of an electrode material,a dielectric (3) which at least partially covers the surface of this electrode material, anda solid electrolyte (4) at least comprising an electrically conductive material which at least partially covers the dielectric surface; ii) applying a primer solution e) to the capacitor body (1), followed by an application of a solution or dispersion a) comprising a conjugated polymer b) and a solvent or dispersant d), followed by an at least partial removal of the solvent or dispersant d) for the formation of the polymeric outer layer (5) that is formed onto the capacitor body (1); wherein the primer solution e) comprises at least one monofunctional amine and at least one carboxylic acid.

An apparatus is disclosed which includes an electrolytic capacitive element with multiple capacitor sections.

A conductive composite is provided, which includes a conductive conjugated polymer and a mixture. The mixture includes (a) boron oxide, and (b) sulfur-containing compound, nitrogen-containing compound, or a combination thereof. A capacitor is also provided, which includes an anode electrode, a dielectric layer on the anode electrode, a cathode electrode, and an electrolyte between the dielectric layer and the cathode electrode, wherein the electrolyte includes the described conductive composite.

A capacitor structure is provided, which includes a positive electrode, a dielectric layer on the positive electrode, and an organic-inorganic composite layer on the dielectric layer. The capacitor structure also includes a negative electrode, and a conductive conjugated polymer electrolyte disposed between the organic-inorganic composite layer and the negative electrode.

The invention relates to a device for thermally disconnecting or tripping an overvoltage protection device, comprising: a locking element (A1), on which a first force (F1) acts, and which is fixed in such a way that same is released when a limit temperature is exceeded; and a slider (S1) which is blocked in a first state (Z1) by the fixed locking element (A1), and on which a second force (F2) acts in order to transfer same into a second state (Z2) when the locking element (A1) is released.

A mounting member includes a body having a surface including a mounting surface on which an object is mountable, a channel arranged in the body, and a first layer arranged on an inner surface of the channel. The first layer has a higher thermal conductivity than the body.

A rework grid array interposer with direct power is described. The interposer has a foundation layer mountable between a motherboard and a package. A heater is embedded in the foundation layer to provide local heat to reflow solder to enable at least one of attachment or detachment of the package. A connector is mounted on the foundation layer and coupled to the heater and to the package to provide a connection path directly with the power supply and not via the motherboard. One type of interposer interfaces with a package having a solderable extension. Another interposer has a plurality of heater zones embedded in the foundation layer.

A method and system for cooling a device (preferably a micro-device), comprising cooling the device by using a lower critical solution temperature (LCST) mixture. Enhancement of heat transfer rates is achieved during phase separation of a two-component system (two-component mixture) with a LCST. Convective heat transfer rates in small diameter pipes and over a vertical (hot) plate are demonstrated.

Embodiments are generally directed to cooling of electronics using folded foil microchannels. An embodiment of an apparatus includes a semiconductor die; a substrate, the semiconductor die being coupled with the substrate; and a cooling apparatus for the semiconductor die, wherein the cooling apparatus includes a folded foil preform, the folded foil forming a plurality of microchannels, and a fluid coolant system to direct a fluid coolant through the microchannels of the folded foil.

An SSD with a package optimized for semiconductor wafers is configured by thinning a plurality of undiced wafers and stacking the wafers. The wafers are connected to each other by TSV. A subset of the wafers include memory circuits. One of the wafer not in the subset includes peripheral circuits. A casing houses the wafers.

A wiring device includes a housing that encloses a line voltage port and a low-voltage port for providing power to at least one removable load. The removable load can couple to a connector PCB. The connector PCB may include a tongue portion with retention surface features and a body portion with supporting circuitry. The tongue portion may be disposed within a low-voltage port of the wiring device. A plurality of conductive traces may extend from the body to the tongue of the connector PCB. The low voltage port may include sidewalls disposed around the tongue portion to guide the plug of a removable load into engagement with the conductive traces of the tongue portion so that one or more of the plurality of conductive traces electrically contact the removable load to deliver power to the removable load.

A surge arrester for the power supply of low-voltage systems, having a housing, two electrodes which are situated axially opposite one another, an arc combustion chamber formed in the interior of the housing, and a trigger aid. A spark gap is formed between the two electrodes so that an arc is produced when the spark gap between the two electrodes is triggered, the axial distance between end faces of the two electrodes being so large that the arc voltage is greater than the expected line voltage. Conversion of energy within the surge arrester is reduced by the arc combustion chamber having an inner region and at least one expansion region into which the arc can propagate after triggering. The inner region is arranged between the two electrodes and is delimited axially by the end faces of the electrodes and is delimited longitudinally by the at least one expansion region.

A household distribution box comprises a distribution box case; two service lines introduced from a transformer into the distribution box case of a consumer; three main lines installed in the distribution box case and provided with two lines and a second service line; two sub-lines installed in the distribution box case and formed by branching the second service line among the main lines into two lines; a first circuit breaker installed in the distribution box case; a second circuit breaker installed in the distribution box case; and a controller connected to the first circuit breaker.

The present disclosure provides a method and a system for protecting an electrical device. The method includes: acquiring coordinate data of the electronic device; determining whether the coordinate data exceeds a data range corresponding to a preset state of the electronic device; and disabling the electronic device when the coordinate data exceeds the data range corresponding to the preset state.

A junction box is configured to be arranged between a DC power source and a load. The junction box includes a first mechanical relay configured to be connected to a positive terminal of the DC power source, a second mechanical relay configured to be connected to a negative terminal of the DC power source, a semiconductor relay connected in series to at least one of the first mechanical relay and the second mechanical relay, and a controller that controls driving of the first mechanical relay, the second mechanical relay and the semiconductor relay respectively. When an abnormal state occurs, the controller controls the first and second mechanical relays to turn the first and second mechanical relays off after controlling the semiconductor relay to turn the semiconductor relay off.

A ground fault circuit interrupter (GFCI) breaker testing system can include an enclosure having at least one wall that forms a cavity. The system can also include at least one GFCI breaker disposed within the cavity. The system can further include a sensing circuit assembly having at least one switch, where the at least one switch is electrically coupled to the at least one GFCI breaker. The system can also include a user interface assembly disposed, at least in part, outside the cavity, where the user interface assembly is coupled to the sensing circuit assembly, where the user interface assembly instructs the at least one switch to test the at least one GFCI breaker.

A surge suppression device includes a micro electromechanical system (MEMS) switch electrically connected to a current path. Additionally, the surge suppression device includes a transient voltage suppression (TVS) device electrically connected in series to the MEMS switch. The surge suppression device is configured to protect electronic components from voltage surges or current surges.

An overvoltage protection device includes a resistor that is connected in series between an internal signal line connected to a communication terminal of a processor and a communication line, a diode of which a cathode is connected to the internal signal line and an anode is connected to a ground, and a PNP transistor of which a base is connected to a power supply terminal, an emitter is connected to the internal signal line, and a collector is connected to the ground. When a base-emitter voltage (a junction saturation voltage) of the transistor in operation is defined as VBE and a power source is turned on (a voltage V1) by the operation of the transistor, a voltage of the internal signal line is limited to the source voltage V1+VBE. When the power source is turned off (a voltage 0 V), the voltage of the internal signal line is limited to the source voltage 0 V+VBE.

The present invention provides a chip and an electronic device. The chip comprises at least one pin, and the chip comprises at least one ESD (Electrostatic Discharge) protection circuit inside, and the ESD protection circuit is employed to reduce or eliminate a damage of electrostatic to other elements or circuit inside the chip, and the ESD protection circuit is located corresponding to a pin, and the ESD protection circuit is electrically coupled to the pin. The electronic device comprises the aforesaid chip.