The CDC designed a flawed test for COVID-19, then took weeks to figure out a fix so state and local labs could use it. New York still doesn’t trust the test’s accuracy By Caroline Chen, Marshall Allen, Lexi Churchill and Isaac Arnsdorf Propublica…

Coronavirus Family Tree The University of Washington Virology lab, which is testing samples for coronavirus, tweeted last night.…

Since late last year, a new coronavirus, now dubbed COVID-19, has been sweeping the globe, sickening more than 114,000 with flu- and cold-like symptoms and killing more than 4,000 so far.…

Agencies, local authorities and national governments do not agree on who should be quarantined or what that should actually look like. Here’s what we do know. By Maya Miller, Caroline Chen and Joshua Kaplan ProPublica People who have been exposed to the coronavirus are being given incomplete or misleading information about whether they should quarantine themselves, exposing major gaps in the public health response to the pandemic and illuminating disagreement among officials about how useful the tactic even is at this point in the disease’s spread.…

By learning from a MERS outbreak in 2015, South Korea was prepared and acted swiftly to ramp up testing when the new coronavirus appeared there. Meanwhile, the U.S., plagued by delay and dysfunction, wasted its advantage. By Stephen Engelberg, Lisa Song and Lydia DePillis ProPublica…

We at the Inlander are committed to keeping people informed and connected throughout the coronavirus outbreak. We'll continue to update this page with the latest headlines.…

There’s a cliche that always follows a big tragedy — something we say after natural disasters, economic collapses, school shootings, acts of terrorisms.…

Low on essential supplies and fearing they’ll get sick, doctors and nurses told ProPublica in-person care for coronavirus patients has been scaled back. In some cases, it’s causing serious harm. By Joshua Kaplan, Lizzie Presser and Maya Miller, ProPublica Every morning, between 7 and 8, at Long Island Jewish Medical Center in Queens, several coronavirus patients are pronounced dead.…

The apps and devices you use are conducting surveillance with your every move Sure, you lock your home, and you probably don't share your deepest secrets with random strangers.…

This is hardly the first time the Catholic Church has to deal with a plague. Spokane Bishop Thomas Daly knows that well.…

On any other week, you can rely on the Inlander for information on live shows happening in Spokane and North Idaho, and to read about the artists and music festivals that we think are worth your time.…

You'll be forgiven if, during the daily deluge of COVID-19-related updates, you didn't notice that some seriously great musicians recently booked shows in and around Spokane for later in the year.…

When he was putting together the latest compilation CD for his label CorpoRAT Records, Kris Martin had intended to hand out promotional discs at Boise's Treefort Music Festival, where several artists from the Spokane label were scheduled to perform, and then officially release the album in April for Record Store Day.…

What's in a name? Which is it — COVID-19 or coronavirus?…

ProPublica’s health reporter Caroline Chen explains what the conversation around asymptomatic coronavirus carriers is missing, and what we need to understand if we’re going to beat this nefarious virus together. By Caroline Chen, ProPublica In the early days of the coronavirus outbreak in the U.S., around the last week of February, I joked to a colleague that maybe now, finally, people would learn how to wash their hands properly.…

The Cannabis Issue In a normal year, cannabis stores would be cashing in this April.…

New TV ads that started airing on morning shows throughout the Spokane region are aimed at grocery shoppers, but they're not hawking deals on cabbage or Cap'n Crunch.…

When Washington Gov. Jay Inslee solemnly looked into the camera on Friday, May 1, he wasn't ready to declare victory yet.…

The present disclosure involves systems, software, and computer-implemented methods for providing process intelligence by correlating events from multiple business process systems to a single business scenario using configurable correlation strategies. An example method includes identifying a raw event associated with a sending business process and a receiving business process, identifying a sending business process attribute associated with the sending business process and a receiving business process attribute associated with the receiving business process, determining a correlation strategy for associating the raw event with a business scenario instance, the determination based at least in part on the sending business process attribute and the receiving business process attribute, and generating a visibility scenario event from the raw event according to the correlation strategy, the visibility scenario event associated with the business scenario instance.

A method for producing a high viscosity, low volatiles blown stripped oil blend is provided. The method may include the steps of: (i) obtaining an oil blend of corn stillage oil and soybean oil having a weight ratio of corn stillage oil to soybean oil of from about 1:2 to 3:1; (ii) heating the oil blend to at least 90° C.; (iii) passing air through the heated oil blend to produce a blown oil having a viscosity of at least 50 cSt at 40° C.; and (iv) stripping the blown oil from step (iii) to reduce an acid value of the blown oil to less than 5.0 mg KOH/gram.

A glass for a magnetic recording medium substrate permitting the realization of a magnetic recording medium substrate affording good chemical durability and having an extremely flat surface, a magnetic recording medium substrate comprised of this glass, a magnetic recording medium equipped with this substrate, and methods of manufacturing the same. The glass is an oxide glass not including As or F.

To provide a method for producing a magnetic disk, whereby a magnetic recording layer is formed at a high temperature. A method for producing a magnetic disk, which comprises a step of forming a magnetic recording layer on a glass substrate having a temperature of at least 550° C., wherein the glass substrate comprises, as represented by mol percentage, from 62 to 74% of SiO2, from 6 to 18% of Al2O3, from 2 to 15% of B2O3 and from 8 to 21%, in total, of at least one component selected from MgO, CaO, SrO and BaO, provided that the total content of the above seven components is at least 95%, and further contains less than 1%, in total, of at least one component selected from Li2O, Na2O and K2O, or contains none of these three components.

A plurality of soda-lime glass batch materials are formed into granules that include a core and a shell surrounding the core. The core comprises a first portion of the plurality of glass batch materials, and the shell comprises a remaining portion of the plurality of glass batch materials. These core-shell granules can be melted in a glass furnace to produce molten soda-lime glass in less time and at a lower temperature than conventional soda-lime glass batch preparations.

Described herein are devices, compositions, and methods for improving color discernment.

A logical operations functional block for an execution unit of a processor includes a first input data link for a first operand and a second input data link for a second operand. The execution unit includes a register connected to an error correction code detection unit. The logical operations functional block includes a look-up table configured to receive an error correction code syndrome from the error correction code detection unit. The logical operations functional block also includes a multiplexer configured to receive an output signal from the look-up table at a first input and the first operand at a second input, wherein an output of the multiplexer is coupled to the first input data link of a logical functional unit.

Embodiments of apparatus and methods for error detection and correction are described. A codeword may have a data portion and associated check bits. In embodiments, one or more error detection modules may be configured to detect a plurality of error types in the codeword. One or more error correction modules coupled with the one or more error detection modules may be further configured to correct errors of the plurality of error types once they are detected by the one or more error detection modules. Other embodiments may be described and/or claimed.

A method includes determining a read threshold voltage corresponding to a group of storage elements in a non-volatile memory that includes a three-dimensional (3D) memory of a data storage device. The method also includes determining an error metric corresponding to data read from the group of storage elements using the read threshold voltage. The method includes comparing the read threshold voltage and the error metric to one or more criteria corresponding to a corrupting event.

A packet transmission/reception apparatus and method is provided. The packet transmission method of the present invention includes acquiring a source payload including partial source symbols from a source block, generating a source packet including the source payload and an identifier (ID) of the source payload, generating a repair packet including a repair payload corresponding to the source payload and an ID of the repair payload, generating a Forward Error Correction (FEC) packet block including the source and repair packets, and transmitting the FEC packet block. The source payload ID includes a source payload sequence number incrementing by 1 per source packet. The packet transmission/reception method of the present invention is advantageous in improving error correction capability and network resource utilization efficiency.

The present invention discloses a method and apparatus for processing and error correction of a GFP-T superblock, where the 64 bytes of payload data of a first superblock are buffered in the first page of a two-page buffer. The flag byte is buffered in a separate buffer, and a CRC operation is performed in a separate logic element. The result of the CRC operation is checked against a single syndrome table which may indicate single- or multi-bit errors. As the payload data of the first superblock is processed and read out of the first page of the two-page buffer, the payload data of a second superblock is written into the second page of the two-page buffer to be processed and corrected.

An error control encoding system produces a codeword from a data word, where the resulting codeword includes the data word and three or more parity segments produced using the data word. The system includes a first encoder to encode the data word in two or more first data segments in order to produce two or more first parity segments, where each of the two or more first data segments includes a respective sequential portion of the data word. The system includes a second encoder to encode the data word in one or more second data segments in order to produce a corresponding one or more second parity segments, where each of the one or more second data segments includes a respective sequential portion of the data word, and each of the one or more second data segments also includes a sequential portion of the data included in a plurality of the two or more first data segments. Further, the system includes a controller configured to provide the two or more first data segments of the data word to the first encoder for encoding and to provide the one or more second data segments of the data word to the second encoder for encoding.

A communication device includes a storage unit to store quotients and remainders associated with multiplication values obtained by multiplying a specified integer number, which is expressed in a form of (2β+α) where β is a positive integer number and α is a positive integer number other than integral multiples of 2, respectively, the quotients and the remainders being obtained by dividing the multiplication values by 2β, respectively, a first unit to divide a dividend by 2βand calculate a quotient and a remainder, a second unit to obtain a quotient, which corresponds to the remainder from the storage unit, and a third unit to determine that the data length of the packet data is normal, when a combination of the quotient and the remainder calculated by the first unit is in the storage unit.

A function f(x) is calculated with a calculating apparatus that makes a correct calculation with a low probability. Provided that G and H are cyclic groups, f is a function that maps an element x of the group H into the group G, X1 and X2 are random variables whose values are elements of the group G, x1 is a realized value of the random variable X1, and x2 is a realized value of the random variable X2, an integer calculation part calculates integers a' and b' that satisfy a relation a'a+b'b=1 using two natural numbers a and b that are relatively prime. A first randomizable sampler is capable of calculating f(x)bx1 and designates the calculation result as u. A first exponentiation part calculates u'=ua. A second randomizable sampler is capable of calculating f(x)ax2 and designates the calculation result as v. A second exponentiation part calculates v'=vb. A determining part determines whether u'=v' or not. A final calculation part calculates ub'va' in a case where it is determined that u'=v'.

Provided are a storage device, controller, and method for using host transfer rates to select a recording medium transfer rate for transferring data to a recording medium. A host transfer rate of data with respect to a buffer is measured. Provided are a plurality of recording medium transfer rates at which data is transferred between the buffer and the recording medium. A determination is made of an amount of decrease in the host transfer rate. The recording medium transfer rate is selected based on the amount of decrease in the host transfer rate. A transfer rate at which the storage device transfers data is set to the selected recording medium transfer rate.

In an interrupt control method of a multicore processor system including cores, a cache coherency mechanism, and a device, a first core detecting an interrupt signal from the device writes into an area prescribing an interrupt flag in the cache memory of the first core, first data indicating detection of the interrupt signal, and notifies the other cores of an execution request for interrupt processing corresponding to the interrupt signal, consequent to the cache coherency mechanism establishing coherency among at least cache memories of the other cores when the first data is written; and a second core different from the first core, maintaining the first data written as the interrupt flag, and notified of the execution request executes the interrupt processing, and writes over the area prescribing the interrupt flag written in the cache memory of the second core, with second data indicating no-detection of the interrupt signal.

A system, method and computer-readable media for managing a compute environment are disclosed. The method includes importing identity information from an identity manager into a module performs workload management and scheduling for a compute environment and, unless a conflict exists, modifying the behavior of the workload management and scheduling module to incorporate the imported identity information such that access to and use of the compute environment occurs according to the imported identity information. The compute environment may be a cluster or a grid wherein multiple compute environments communicate with multiple identity managers.

A manufacturing method of a glass substrate for a magnetic disk is provided whereby nano pits and/or nano scratches cannot be easily produced in polishing a principal face of a glass substrate using a slurry containing zirconium oxide as an abrasive. The manufacturing method of a glass substrate for a magnetic disk includes, for instance, a polishing step of polishing a principal face of a glass substrate using a slurry containing, as an abrasive, zirconium oxide abrasive grains having monoclinic crystalline structures (M) and tetragonal crystalline structures (T).

A computing section is provided with a plurality of computing units and correlatively stores entries of configuration information that describes configurations of the plurality of computing units with physical configuration numbers that represent the entries of configuration information and executes a computation in a configuration corresponding to a designated physical configuration number. A status management section designates a physical configuration number corresponding to a status to which the computing section needs to advance the next time for the computing section and outputs the status to which the computing section needs to advance the next time as a logical status number that uniquely identifies the status to which the computing section needs to advance the next time in an object code. A determination section determines whether or not the computing section has stored an entry of configuration information corresponding to the status to which the computing section needs to advance the next time based on the logical status number that is output from the status management section. A rewriting section correlatively stores the entry of the configuration information and a physical configuration number corresponding to the entry of the configuration information in the computing section when the determination section determines that the computing section has not stored the entry of configuration information corresponding to the status to which the computing section needs to advance the next time.

A method and circuit arrangement utilize a low latency variable transfer network between the register files of multiple processing cores in a multi-core processor chip to support fine grained parallelism of virtual threads across multiple hardware threads. The communication of a variable over the variable transfer network may be initiated by a move from a local register in a register file of a source processing core to a variable register that is allocated to a destination hardware thread in a destination processing core, so that the destination hardware thread can then move the variable from the variable register to a local register in the destination processing core.

A technique for activating processor cores within a computer system is disclosed. Initially, a value representing a number of processor cores to be enabled within the computer system is received. The computer system includes multiple processors, and each of the processors includes multiple processor cores. Next, a scale variable value representing a specific type of tasks to be optimized during an execution of the tasks within the computer system is received. From a pool of available processor cores within the computer system, a subset of processor cores can be selected for activation. The subset of processor cores is activated in order to achieve system optimization during an execution of the tasks.

A method for activating processor cores within a computer system is disclosed. Initially, a value representing a number of processor cores to be enabled within the computer system is received. The computer system includes multiple processors, and each of the processors includes multiple processor cores. Next, a scale variable value representing a specific type of tasks to be optimized during an execution of the tasks within the computer system is received. From a pool of available processor cores within the computer system, a subset of processor cores can be selected for activation. The subset of processor cores is activated in order to achieve system optimization during an execution of the tasks.

In accordance with embodiments, there are provided mechanisms and methods for controlling a process using a process map. These mechanisms and methods for controlling a process using a process map can enable process operations to execute in order without necessarily having knowledge of one another. The ability to provide the process map can avoid a requirement that the operations themselves be programmed to follow a particular sequence, as can further improve the ease by which the sequence of operations may be changed.

A method of monitoring thread execution within a multicore processor architecture which comprises a plurality of interconnected processor elements for processing the threads, the method comprising receiving a plurality of thread parameter indicators of one or more parameters relating to the function and/or identity and/or execution location of a thread or threads, comparing at least one of the thread parameter indicators with a first plurality of predefined criteria each representative of an indicator of interest, and generating an output consequential upon thread parameter indicators which have been identified to be of interest as a result of the said comparison.

A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.

An aspect of the present invention identifies differences between source codes (e.g. of different versions of a software), when each source code is organized using incorporated files. In one embodiment, in response to receiving identifiers of a first and second source codes (each source code being organized as a corresponding set of code files), listings of the instructions in the first and second source codes are constructed. Each listing is constructed, for example, by replacing each incorporate statement in the source code with instructions stored in a corresponding one of code files. The differences between the first and second source codes are then found by comparing the constructed listings of instructions.

The present invention relates to a method for compiling code for a multi-core processor, comprising: detecting and optimizing a loop, partitioning the loop into partitions executable and mappable on physical hardware with optimal instruction level parallelism, optimizing the loop iterations and/or loop counter for ideal mapping on hardware, chaining the loop partitions generating a list representing the execution sequence of the partitions.

Dive computers in accordance with embodiments of the invention are disclosed that store information concerning a dive site. The stored information can be accessed during the dive to provide information concerning such things as points of interest and/or hazards. One embodiment of the invention includes a processor, memory connected to the processor, a pressure transducer connected to the processor and configured to measure depth, and a display connected to the processor. In addition, the memory contains factual information concerning a dive site, and the processor is configured to display at least a portion of the stored factual information concerning the dive site via the display.

Vehicle event recorder systems are arranged to be in constant communication with remote servers and administrators via mobile wireless cellular networks. Vehicle event recorders equipped with video cameras capture video and other data records of important events relating to vehicle use. These data are then transmitted over special communications networks having very high coverage space but limited bandwidth. A vehicle may be operated over very large region while maintaining continuous communications connections with a remote fixed server. As such, systems of these inventions may be characterized as including a mobile unit having: a video camera; a microprocessor; memory; an event trigger; and mobile wireless transceivers, and a fixed network portion including: mobile wireless cellular network, a protocol translation gateway, the Internet and an application-specific server.

The invention relates to a non-corrosive degreasing concentrate and ready to use formulation. In particular, non-corrosive compositions capable of removing polymerized grease as effectively as some alkali metal hydroxide (i.e. caustic) based degreasers without requiring the use of personal protective equipment are disclosed.

Gemini surfactants of bis-N-alkyl polyether, bis-N-alkenyl polyether, bis-N-cycloalkyl polyether, bis-N-aryl polyether bis-beta or alpha-amino acids or their salts, are produced for use as multifunctional corrosion inhibitors, which protect and prevent corrosion of ferrous metals exposed to acidic, basic and neutral liquids when transporting or storing crude oil and liquid fuels. The surfactants are also used to inhibit corrosion of equipment and pipes used in cooling systems in petroleum and petrochemical equipment. The Gemini surfactants have the structural formula:

According to one embodiment, an audio controlling apparatus includes a first receiver configured to receive audio signal, a second receiver configured to receive environmental sound, a temporary gain calculator configured to calculate temporary gain based on environmental sound received by second receiver, a sound type determination module configured to determine sound type of main component of audio signal received by first receiver, and a gain controller configured to stabilize temporary gain that is calculated by temporary gain calculator and set gain, when it is determined that sound type of main component of audio signal received by first receiver is music.