A formable structure comprises a first material having a first level of viscosity and a second material having a second level of viscosity, wherein the second material is formed to hold at least a portion of the first material in a particular position or a particular shape. The first material can be configured to function as a thermal interface between two or more hardware components. The second material can be configured to have a higher viscosity than the first material. In one illustrative example, the second material can include a light-activated resin that is configured to harden when exposed to one or more treatments. By the use of the first material and second material, the techniques disclosed herein are adaptable to gaps having a wide range of sizes, which is difficult to do with traditional thermal interface materials. The second material can also function as an EMI shield.

Generally discussed herein are devices and methods for thermal management of a component. An apparatus can include a phase change material substantially at a phase transition temperature of the phase change material, a component near, on, or at least partially in the phase change material, and a heat removal device to transfer heat energy away from the phase change material and maintain the phase change material substantially at the phase transition temperature.

Provided are a heat recovery apparatus based on a fuel cell and an operating method thereof. In the fuel cell-based heat recovery apparatus and the operating method thereof, hot water and steam may be generated by using heat generated while a molten carbonate fuel cell (MCFC) operates to supply the generated hot water or steam to buildings, thereby reducing a rate of operation in cooling/heating equipment using electricity so as to reduce air-conditioning costs.

A cooling plate with a structural plate and a cover plate, wherein the structural plate has a channel-like recess which is enclosed by a raised edge region. The cover plate rests on the raised edge region and covers the channel-like recess in order to form a channel. Openings with connection elements arranged at the openings are provided in the structural plate and/or in the cover plate in order to let a fluid into the channel and to let a fluid out of the channel. A first mounting opening, which is in the form of a round hole, and a second mounting opening, which is in the form of an elongate hole, are provided in both the structural plate and in the cover plate, the respective first and second mounting openings being aligned with one another in order to receive a pin for fixing the two plates during a soldering process.

A swing structure of a heat dissipating device includes an elongated blade and a magnetic actuation disposed on the blade. The blade has a loading segment and a heat dissipating segment, two opposite end portions of the loading segment are respectively defined as a mounting end portion and a connecting end portion, and two opposite end portions of the heat dissipating segment are respectively defined as a positioning end portion and a free end portion. The connecting end portion is connected to the positioning end portion. A thickness of the loading segment is greater than that of the heat dissipating segment. When the magnetic actuation is driven by a magnetic field to swing the blade, a swing angle of the free end portion of the heat dissipating segment is greater than that of the connecting end portion of the loading segment.

A liquid-cooling heat sink has a heat-conductive tube and multiple heat-conductive units arranged adjacent to the heat-conductive tube. The heat-conductive tube has a first tube and a second tube. An isolation member having an isolation channel is located between the first tube and the second tube. The isolation member obstructs the heat exchange between the first tube and the second tube. A first delivery tube and a second delivery tube of each one of the heat-conductive bodies respectively connect to the first tube and the second tube of the heat-conductive tube, thereby integrating the first tube and the second tube and obstructing the heat exchange between the cooling liquids with different temperatures. Each of the heat-conductive units distributes the cooling liquids with different temperatures by the heat-conductive tube, thereby simplifying the pipeline setting and reducing the volume of the liquid-cooling heat sink.

A Rack Information Handling System (RIHS) has a liquid cooling subsystem that provides cooling liquid to liquid cooled (LC) nodes received in chassis-receiving bays of a rack. Leak collection structures are positioned to receive cooling liquid that leaks from the liquid cooling subsystem. Liquid sensors detect a presence of leaked cooling liquid in the leak collection structures. A leak detection subsystem responds to a detected presence of liquid by providing a leak indication. In one or more embodiments, the liquid cooling subsystem has a liquid rail formed by more than one rack interconnections vertically aligned in a rear section of the rack that are connected by modular rail conduits for node-to-node fluid transfer. The leak collection structures include a pipe cover received over at least one modular rail conduit. A liquid cavity of each pipe cover spills over into another lower pipe cover at a rate that can be correlated to severity of the leak.

A heat sink includes a cooling module and an installing assembly for fixing the heat sink on a housing. The installing assembly includes a case, a handle rotatablely fixed in the case and a support including a fixing board with blocks and two brackets. The handle is actively connected with the support. The fixing board is fixed on a bottom plate of the case. The handle includes two bulges. The brackets include two slide openings for receiving the bulges. When the heat sink is installed, the handle is rotated to be vertical, the bulges are out of the slide openings, and the blocks are stuck on the housing. When the heat sink is dismantled, the handle is rotated to be horizontal and the bulges are stuck into the slide openings to resist the brackets, thereof the fixing board being uplifted and the blocks being pushed away from the housing.

Disclosed is a heat exchanger including: a heat exchanger body; a gas inlet for introducing exhaust gas into the heat exchanger body; a coolant inlet for introducing a coolant into the heat exchanger body; a gas outlet for discharging the exhaust gas that is cooled by heat exchange with the coolant; and a coolant outlet for discharging the coolant that completes heat exchange with the exhaust gas. In this case, the heat exchanger body includes: a laminated tube core formed by laminating a plurality of gas channels side by side; a housing formed so as to enclose the laminated tube core except for opposite ends thereof; and a wave fin plate integrally provided with a plurality of wave fins and arranged within each of the gas channels, wherein each of the wave fins includes a fixed pitch section, and a variable pitch section.

An integratable movement device for ventilating equipment includes an electric machine such as a motor and a fan wheel connected with the electric machine. The movement device further includes a housing, wherein the electric machine and the fan wheel are installed in an inner lower portion of the housing. An upper portion of the housing integrally forms one or more venting outlets. A plurality of venting outlet units is provided at the venting outlets respectively. A chamber provided between the venting outlets and the fan wheel in the housing defines a venting channel. The housing having the venting outlets and the venting channel, along with the venting outlet units, the electric machine and the fan wheel configure the integratable movement device that is able to be directly assembled into the ventilating equipment.

What is disclosed is a heat exchanger including: a core including a plurality of core plates, first and second passages, and a vertical passage; a base plate including a passage port; and a distance plate; wherein the first vertical passage and the passage port are arranged apart from each other in a direction orthogonal to a stacking direction of the core plates, and wherein the distance plate includes a bottom wall part and a swelling part, the bottom wall part being a thin plate-shaped and being joined to an upper surface of the base plate, the swelling part swelling up in the stacking direction from the bottom wall part so as to surround a circumference of a communication passage which communicates the first vertical passage with the passage port and being joined to a lowermost surface of the core in a flange part of a tip of the swelling part.

A high-efficiency plate type heat exchanger increases a heat-exchanging efficiency with an exhaust gas by connecting unit fluidized beds formed with stacked heat exchanging plates to each other in up and down directions, and elongating a flow path of circulating water to be greater than or equal to two passes (2-PASS). The heat exchanger retrieves heat of an exhaust gas by increasing a flow amount of circulating water of a portion close to a burner while a circulation path is elongated as described above. In addition, the high-efficiency plate type heat exchanger increases efficiency thereof by inserting a baffle plate having distribution holes between unit fluidized beds, controlling a flow of an exhaust gas while reducing an exhaust speed of the exhaust gas using heat exchanging fins of the baffle plate, absorbing heat of the exhaust gas, and effectively using a heat transfer area.

A heat exchange device includes a housing, a heat exchange module, and a piezoelectric module. Isolated inner and outer circulation chambers are formed in the housing. The heat exchange module in the housing includes a stack of separated plates parallel to each other. An inner channel communicated with the inner circulation chamber and an outer channel communicated with the outer circulation chamber are defined respectively by both sides of one of the plates and the other adjacent plates. The piezoelectric module in the housing includes a piezoelectric chip, and first and second heat exchange sides thermally coupled to the piezoelectric chip. The first heat exchange side is located in the inner circulation chamber and the second heat exchange side is located in the outer circulation chamber, so that heat can be transferred between the inner and outer circulation chambers via the piezoelectric chip.

An adjustable refrigerant distribution device and a heat exchanger having same. The heat exchanger comprises: first and second collecting pipes; a heat exchanger core body; and a refrigerant distribution device, the refrigerant distribution device comprises a first distribution pipe, a first inlet pipe and a first drive assembly. The pipe wall of the first distribution pipe is provided with a first distribution hole. The first distribution pipe is inserted into at least one of the first and the second collecting pipes. The first inlet pipe is located outside at least one collecting pipe and is in communication with the first distribution pipe, and the first drive assembly drives the first distribution pipe to move relative to at least one collecting pipe. The distribution pipe of the refrigerant distribution device and the heat exchanger can translate along the axial direction, thereby adjusting refrigerant distribution so as to satisfy different distribution requirements.

In order to enhance heat reception from a cooling target object by a heat sink to efficiently cool a device, the cooling target object, a cooling device including a heat sink and a fluid path is provided. Further, the heat sink includes a heat receiving face. The fluid path is formed so as to allow a predetermined fluid to pass therethrough. The heat exchange portion includes a first path arranged approximately in parallel to the heat receiving face of the heat sink.

Integrated heat spreaders having electromagnetically-formed features, and semiconductor packages incorporating such integrated heat spreaders, are described. In an example, an integrated heat spreader includes a top plate flattened using an electromagnetic forming process. Methods of manufacturing integrated heat spreaders having electromagnetically-formed features are also described.

In a cooled component system, a heat exchanger mounted on a surface of the industrial component is housed in an isolated access compartment adjacent to but separated from the primary compartment containing the industrial component. Housing the heat exchanger in a separately accessible compartment permits access to the heat exchanger for cleaning or other purposes without having to shut down the industrial component being cooled. A means for moving a cooling media over the surface a the heat exchanger might also be included to maximize heat exchange.

An electronic rack includes a housing to contain one or more IT components arranged in a stack, a first rack aisle formed on a first side of the one or more IT components to direct cooler air received from the cooling unit upwardly, and a second rack aisle formed on a second side of the one or more IT components to direct warmer air to the cooling unit downwardly. The electronic rack further includes a cooling unit having one or more cooling units disposed underneath the IT components to receive first liquid from an external chiller system, to exchange heat carried by the warmer air using the first liquid to generate the cooler air, to transform the first liquid into a second liquid with a higher temperature, and to transmit the second liquid carrying the exchanged heat back to the external chiller system.

A rack airflow monitoring system is configured to measure airflow through an equipment rack having a housing and a perforated front door to enable air to flow into an interior of the housing. The system includes a control module, and a plurality of airflow sensors secured to the front door of the equipment rack and coupled to the control module. Each airflow sensor is configured to detect a parameter used to measure airflow and communicate detected parameters to the control module. The control module is configured to obtain temperature, airflow velocity, and airflow directionality from the plurality of airflow sensors at the front door of the equipment rack.

Embodiments of the invention provides a decoder for decoding a signal received through a transmission channel in a communication system, said signal carrying information symbols selected from a given alphabet and being associated with a signal vector, said transmission channel being represented by a channel matrix, wherein said decoder comprises: a sub-block division unit (301) configured to divide the received signal vector into a set of sub-vectors in correspondence with a division of a matrix related to said channel matrix;a candidate set estimation unit (305) for recursively determining candidate estimates of sub-blocks of the transmitted signal corresponding to said sub-vectors, each estimate of a given sub-block being determined from at least one candidate estimate of the previously processed sub-blocks,wherein said candidate set estimation unit is configured to determine a set of candidate estimates for at least one sub-block of the transmitted signal by applying at least one iteration of a decoding algorithm using the estimates determined for the previously processed sub-blocks, the number of candidate estimates determined for said sub-block being strictly inferior to the cardinal of the alphabet and superior or equal to two, the decoder further comprising a signal estimation unit (306) for calculating an estimate of the transmitted signal from said candidate estimates determined for said sub-blocks.

The present invention aims to provide a technology capable of enhancing the effect of reducing differential data in size. A bit shift unit shifts either of old data and new data in a forward direction and a backward direction of its bit string by each of 0, 1, 2, . . . , and n bit(s) to generate a plurality of data. A copy bit string extracting unit extracts information on copy bit strings based on the plurality of data and other non-shifted data. An additional bit string extracting unit excludes copy bit strings from the new data to extract information on additional bit strings. A differential data generating unit creates differential data based on the information on copy bit strings and the information on additional bit strings.

A switch-scanning circuit includes a chip and switching units. The chip includes pins having an output operation mode and an input operation mode, and a processing unit. The processing unit sets one of the pins as an input pin and the rest of the pins as output pins sequentially according to a clock signal, uses a scan signal to provide different voltages to the output pins, and then determines states of button switches according to a voltage of the input pin. The switching unit includes a power source resistance, switches and resistors. A first terminal and a second terminal of the power source resistance are electrically connected to a power source and a first pin respectively. The resistors have terminals electrically connected the first pin and terminals of the switches. The other terminals of the switches are connected to the pins other than the first pin.

Input device adhesive techniques are described. A pressure sensitive key includes a sensor substrate having one or more conductors, a spacer layer, and a flexible contact layer. The spacer layer is disposed proximal to the sensor substrate and has at least one opening. The flexible contact layer is spaced apart from the sensor substrate by the spacer layer and configured to flex through the opening in response to an applied pressure to initiate an input. The flexible contact layer is secured to the spacer layer such that at first edge, the flexible contact layer is secured to the spacer layer at an approximate midpoint of the first edge and is not secured to the spacer along another portion of the first edge and at a second edge, the flexible contact layer is not secured to the spacer layer along an approximate midpoint of the second edge.

A summing node is provided for summing a first and second differential signals. Each of the first and second differential signals comprise respective direct and inverse signal components. The summing node comprises a first differential transistor pair comprising a first and second input and coupled to a first and second output. The summing node further comprises a second differential transistor pair comprising a third and fourth input and coupled to the first and second output. The first and fourth inputs are respectively coupled to the direct and inverse signal components of the first differential signal and the second and third inputs are respectively coupled to the direct and inverse signal components of the second differential signal.

The pulse width modulator includes a subtraction unit configured to perform subtraction between an m value digital signal and a pulse width modulation signal; a feedforward filter unit configured such that a ΔΣ modulator to which an output signal of the subtraction unit is input and which includes integrators of a second order or higher is in cascade connection, and configured to operate with a sampling frequency FS; a product-sum computing unit configured to operate with a sampling frequency (FS/n) (n: an integer of two or more) to perform product-sum computing of an output signal of each integrator of the feedforward filter unit; and a pulse width modulation unit configured to operate with the sampling frequency (FS/n) to perform pulse width modulation of an output signal of the product-sum computing unit to output a pulse width modulation signal.

A level shifter circuit includes a level shifting unit configured to receive signals that may vary in a first range via a positive input terminal and a negative input terminal, respectively and to output signals that may vary in a second range to a positive output terminal and a negative output terminal, respectively, where the second range is larger than the first range, a first pre-charging unit configured to pre-charge the positive output terminal to a predetermined level when a clock is in a first level, and a second pre-charging unit configured to pre-charge the negative output terminal to the predetermined level when the clock is in the first level.

A method for adaptively regulating a coding mode and a digital correction circuit thereof are provided. The method is for a successive-approximation-register analog-to-digital converter (SAR ADC). In the method, whether to regulate a binary weight corresponding to each of digital bits is determined according to the number of completed comparison cycles to provide a first coding sequence. The first coding sequence is directly compensated according to uncompleted comparison cycles to provide a correct digital output code.

The invention relates to an encoder and a decoder and methods therein for supporting split gain shape vector encoding and decoding. The method performed by an encoder, where the encoding of each vector segment is subjected to a constraint related to a maximum number of bits, BMAX, allowed for encoding a vector segment. The method comprises, determining an initial number, Np—init, of segments for a target vector x; and further determining an average number of bits per segment, BAVG, based on a vector bit budget and Np—init. The method further comprises determining a final number of segments to be used, for the vector x, in the gain shape vector encoding, based on energies of the Np—init segments and a difference between BMAX and BAVG. The performing of the method enables an efficient allocation of the bits of the bit budget over the target vector.

A system, method and computer program product for encoding an input string of binary characters representing alphanumeric characters. A system includes: a character writing engine for writing a binary character to an empty cell of a multi-dimensional shape beginning with a starting empty cell; a next cell determination engine for determining a next empty cell by traversing neighboring cells in the multi-dimensional shape until an empty cell is located; a loop facilitator for looping back to the character writing engine and the next cell determining engine until no more data characters or a next empty cell is not determined; and a serialization engine for serializing the cells into a one dimensional binary string of characters representing an encoded string of alphanumeric characters.

Disclosed are an apparatus and method for compressing continuous data. The apparatus for compressing continuous data may include a data generator configured to calculate differences between adjacent values in original continuous data and generate data based on the calculated differences.

A codeset having function-code combinations is provisioned on a controlling device to control functions of an intended target device. Input is provided to the controlling device which designates a function to be controlled on the intended target device. From a plurality of codes that are each associated with the designated function in a database stored in a memory of the controlling device a first code that is determined to be valid for use in controlling the designated function on the intended target device is selected. When the codeset is then provisioned on the controlling device, the provisioned codeset includes as a function-code combination thereof the designated function and the first code.

Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may include receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal utilizing a decorrelation algorithm on frequencies within a desired frequency bandwidth. The decorrelation algorithm may comprise a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals. A multiplier may be configured to cancel the blocker signal utilizing the determined complex coupling coefficients.

A converter includes: a terminal that receives code-modulated power that has been generated with a modulation code; and a circuit that intermittently converts the code-modulated power with a conversion code based on the modulation code. The code-modulated power is alternating-current power.

Methods and apparatus are described. A method, implemented in a decoder, includes receiving two or more signals from an encoder over two or more respective wires. At least one of the two or more signals includes at least one code that was recoded by the encoder. The decoder receives a recoding table. The recoding table provides a mapping indicating the recoding for each code that was recoded by the encoder in the received two or more signals. The decoder decodes the two or more received signals using the received recoding table.

A computer-implemented method, system, and apparatus for storing binary data is disclosed. A processor receives a digital bit stream and transforms the digital bit stream to an encoded digital bit stream. The encoded digital bit stream comprises a data message encoded by an OCTS-expanded table for storage. The processor stores the encoded digital bit stream on a digital data storage device or system.

An electronic apparatus and a method for detecting status of keys thereof are provided. The electronic apparatus comprises a key module, a key control circuit, a conversion circuit with calibration mechanism and a processor. The key control circuit detects whether any of keys in the key module is pressed. If the detection result is affirmative, the press status of each of the keys is scanned by the key control circuit to obtain a coarse scan result. The conversion circuit with calibration mechanism is configured to perform the other system function of the electronic apparatus. When the processor determines that at least one of the keys is not pressed according the coarse scan result, the conversion circuit with calibration mechanism is switched to assist a re-scan operation of the press status of the at least one of the keys.

For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine timing mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology utilizes cross-correlation of each DAC unit elements (UEs) output to the entire modulator output to measure its timing mismatch error respectively. Specifically, the timing mismatch error is estimated using a ratio based on a peak value and a value for the next tap in the cross-correlation function. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.

For analog-to-digital converters (ADCs) which utilize a feedback digital-to-analog converter (DAC) for conversion, the final analog output can be affected or distorted by errors of the feedback DAC. A digital measurement technique can be implemented to determine switching mismatch error for the feedback DAC in a continuous-time delta-sigma modulator (CTDSM) or in a continuous-time pipeline modulator. The methodology forces each DAC unit elements (UEs) to switch a certain amount times and then use the modulator itself to measure the errors caused by those switching activities respectively. The obtained errors can be stored in a look-up table and fully corrected in digital domain or analog domain.

This invention relates to a system, method and computer program product for encoding an input string of binary characters including: a cellular data structure definition including a starting empty cell; one or more path definitions defining paths through the data structure; a character reading and writing engine for writing a binary character to an empty cell with a predefined initial position; a next cell determination engine for determining a next empty cell by methodically checking cells along one of the paths in the data structure until an empty cell is located; a loop facilitator for looping back to the writing next character step and the determining next cell step until there are no more data characters or a next empty cell is not determined; and a serialization deserialization engine for methodically serializing the data structure into a one dimensional binary string of characters representing an encoded string of alphanumeric characters.

Modifying a digital data stream that includes immediately consecutive code words of different length by segmenting, based on a certain block grid, the digital data stream. Each block of the block grid includes a fixed number of bits. It is determined whether all bits of the last block associated with the digital data stream are occupied by data of the digital data stream. If not all bits of the last block are occupied, the unoccupied bits of the last block are padded with bits of an end-of-record (EOR) indicator. If all bits of the last block are occupied, attaching an EOR indicator to the digital data stream is skipped.

A probabilistic digitizer for extracting information from a Josephson comparator is disclosed. The digitizer uses statistical methods to aggregate over a set of comparator readouts, effectively increasing the sensitivity of the comparator even when an input signal falls within the comparator's gray zone. Among other uses, such a digitizer may be used to discriminate between states of a qubit.

The disclosure relates to a circuit for stabilizing a digital-to-analog converter reference voltage. One example embodiment is a circuit for stabilizing a voltage on a reference node. The circuit includes a digital-to-analog converter that includes an array of capacitors and arranged for: receiving an input voltage via an input node, receiving a voltage via a reference node and a digital-to-analog code via a controller node, and outputting a digital-to-analog output voltage. The circuit also includes a capacitive network on the reference node comprising a fixed capacitor arranged to be pre-charged to an external reference voltage and a variable capacitor arranged to be pre-charged to an external auxiliary voltage. Further, the circuit includes a measurement block. In addition, the circuit includes a calibration block arranged for determining an updated setting of the variable capacitor based on the digital-to-analog code and the measured voltage on the reference node.

A circuit and a method for converting an analog signal to a digital value representation is disclosed. In one aspect, the circuit includes an incremental sigma-delta analog-to-digital converter (ADC). The circuit further includes a first input line for providing a primary analog signal representing a sensor measurement to the incremental sigma-delta ADC. The circuit further includes a second input line for providing a secondary analog signal to the incremental sigma-delta ADC. The incremental sigma-delta ADC receives the primary and secondary analog signals during a first period (TADC1) and a second period (TADC2), respectively. The circuit further includes a filter configured to weight the digital values in a sequence of digital values output by the incremental sigma-delta ADC, and to output a single digital value representing the sensor measurement.

System and methods for input path matching in pipelined continuous-time Analog-to Digital Converters (ADCs), including pipelined Continuous-Time Delta Sigma Modulator (CTDSM) based ADCs, includes an input delay circuit disposed in a continuous-time input path from an input of an analog input signal to a first summing circuit of the continuous-time ADC. At least one digital delay line is disposed between an output of an earlier stage sub-ADC (of a plurality of pipelined sub-ADCs) and a sub-digital-to-analog converter (DAC) that is coupled to the first summing circuit, and between the earlier stage sub-ADC and a digital noise cancellation filter. The digital delay line(s) is configured to enable calibration of delay of output of the earlier stage sub-ADC provided to the sub-DAC and the digital noise cancellation filter in accordance with process variations of the input delay match circuit to minimize residue output at first summing circuit.

A system of systems to monitor data for carbon flux, for example, at scales capable of managing regional net carbon flux and pricing carbon financial instruments is disclosed. The system of systems can monitor carbon flux in forests, soils, agricultural areas, body of waters, flue gases, and the like. The system includes a means to identify and quantify sources of carbon based on simultaneous measurement of isotopologues of carbon dioxide, for example, industrial, agricultural or natural sources, offering integration of same in time and space. Carbon standards are employed at multiple scales to ensure harmonization of data and carbon financial instruments.

Method for producing a uranium concentrate in the form of solid particles, by precipitation from a uranium-containing solution using a precipitating agent, in a vertical reactor comprising a base, a top, a central part, an upper part, and a lower part, the solid particles of the uranium concentrate forming a fluidized bed under the action of a rising liquid current which circulates from the base towards the top of the reactor successively passing through the lower part, the central part and the upper part of the reactor, and which is created by introducing a liquid recycling current (flow) at the base of the reactor, said liquid recycling current being tapped at a first determined level (A) in the upper part of the reactor and sent back without settling to the base of the reactor, excess liquid being also evacuated via an overflow located at a second determined level (B) in the upper part of the reactor; a method in which the upper limit (C) of the fluidized bed of solid particles is controlled so that it is positioned at a level below the first and second determined levels.

The present invention relates to means and methods for producing crystals or crystalline substances. In particular, crystals or crystalline substances which are useful as pharmaceutical ingredients can be manufactured.

A rotating knife is disclosed for disintegrating a crystal bed formed in a washing column for processing suspension of solid particles in a liquid. The rotating knife is provided with a spoke support. The spoke support comprises at least two spokes. The relative angle of the spokes is between approximately 20° and approximately 80°.

Disclosed herein is a method of fabricating a CIS or CIGS thin film, comprising: forming, on a substrate, a seed particle layer comprising copper-indium-compound seed particles comprising copper (Cu); indium (In); and at least one selected from the group consisting of gallium (Ga), sulfur (S) and selenium (Se),applying, on the seed particle layer, a water-soluble precursor solution comprising: a water-soluble copper (Cu) precursor;a water-soluble indium (In) precursor; andat least one selected from the group consisting of a water-soluble gallium (Ga) precursor, a water-soluble sulfur (S) precursor and a water-soluble selenium (Se) precursor, and forming a thin film at high temperature.

Method for the production of a coarse-grained ammonium sulphate product by crystallization and installation for carrying out the method from an ammonium sulphate solution in a DTB type crystallizer having an internal suspension circuit and a clarifying zone, from which a clarified partial flow of solution is constantly drawn off into an external circuit, is heated in a heat exchanger to dissolve the solids contained therein and is guided back as a clear solution into the lower region of the crystallizer. A fine crystal suspension flow is drawn off from the clarifying zone as a further partial flow and guided back into the internal circuit of the crystallization stage without any previous dissolution of the solid proportion contained therein.