A semiconductor device has a semiconductor wafer with a plurality of contact pads. A first insulating layer is formed over the semiconductor wafer and contact pads. A portion of the first insulating layer is removed, exposing a first portion of the contact pads, while leaving a second portion of the contact pads covered. An under bump metallization layer and a plurality of bumps is formed over the contact pads and the first insulating layer. A second insulating layer is formed over the first insulating layer, a sidewall of the under bump metallization layer, sidewall of the bumps, and upper surface of the bumps. A portion of the second insulating layer covering the upper surface of the bumps is removed, but the second insulating layer is maintained over the sidewall of the bumps and the sidewall of the under bump metallization layer.

Embodiments of a method for fabricating stacked microelectronic packages are provided, as are embodiments of a stacked microelectronic package. In one embodiment, the method includes arranging microelectronic device panels in a panel stack. Each microelectronic device panel includes a plurality of microelectronic devices and a plurality of package edge conductors extending therefrom. Trenches are formed in the panel stack exposing the plurality of package edge conductors. An electrically-conductive material is deposited into the trenches and contacts the plurality of package edge conductors exposed therethrough. The panel stack is then separated into partially-completed stacked microelectronic packages. For at least one of the partially-completed stacked microelectronic packages, selected portions of the electrically-conductive material are removed to define a plurality of patterned sidewall conductors interconnecting the microelectronic devices included within the stacked microelectronic package.

It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.

A process for preparing a semiconductor structure for mounting to a carrier is disclosed. The process involves causing a support material to substantially fill a void defined by surfaces formed in the semiconductor structure and causing the support material to solidify sufficiently to support the semiconductor structure when mounted to the carrier.

A III-N device is described with a III-N material layer, an insulator layer on a surface of the III-N material layer, an etch stop layer on an opposite side of the insulator layer from the III-N material layer, and an electrode defining layer on an opposite side of the etch stop layer from the insulator layer. A recess is formed in the electrode defining layer. An electrode is formed in the recess. The insulator can have a precisely controlled thickness, particularly between the electrode and III-N material layer.

The object of the invention is to provide a method for fabricating a semiconductor device having a peeled layer bonded to a base material with curvature. Particularly, the object is to provide a method for fabricating a display with curvature, more specifically, a light emitting device having an OLED bonded to a base material with curvature. An external force is applied to a support originally having curvature and elasticity, and the support is bonded to a peeled layer formed over a substrate. Then, when the substrate is peeled, the support returns into the original shape by the restoring force, and the peeled layer as well is curved along the shape of the support. Finally, a transfer object originally having curvature is bonded to the peeled layer, and then a device with a desired curvature is completed.

Methods for fabricating integrated circuits include fabricating a logic device on a substrate, forming an intermediate semiconductor substrate on a surface of the logic device, and fabricating a capacitor-less memory cell on the intermediate semiconductor substrate. Integrated circuits with capacitor-less memory cells formed on a surface of a logic device are also disclosed, as are multi-core microprocessors including such integrated circuits.

Embodiments generally relate to optoelectronic devices and more specifically, to textured layers in optoelectronic devices. In one embodiment, a method for providing a textured layer in an optoelectronic device includes depositing a first layer of a first material and depositing an island layer of a second material on the first layer. Depositing the island layer includes forming one or more islands of the second material to provide at least one textured surface of the island layer, where the textured surface is operative to cause scattering of light.

Disclosed is a semiconductor device including an oxide semiconductor film. A first oxide semiconductor film with a thickness of greater than or equal to 2 nm and less than or equal to 15 nm is formed over a gate insulating layer. First heat treatment is performed so that crystal growth from a surface of the first oxide semiconductor film to the inside thereof is caused, whereby a first crystal layer is formed. A second oxide semiconductor film with a thickness greater than that of the first oxide semiconductor film is formed over the first crystal layer. Second heat treatment is performed so that crystal growth from the first crystal layer to a surface of the second oxide semiconductor film is caused, whereby a second crystal layer is formed. Further, oxygen doping treatment is performed on the second crystal layer.

To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.

An object is to provide a thin film transistor and a method for manufacturing the thin film transistor including an oxide semiconductor with a controlled threshold voltage, high operation speed, a relatively easy manufacturing process, and sufficient reliability. An impurity having influence on carrier concentration in the oxide semiconductor layer, such as a hydrogen atom or a compound containing a hydrogen atom such as H2O, may be eliminated. An oxide insulating layer containing a large number of defects such as dangling bonds may be formed in contact with the oxide semiconductor layer, such that the impurity diffuses into the oxide insulating layer and the impurity concentration in the oxide semiconductor layer is reduced. The oxide semiconductor layer or the oxide insulating layer in contact with the oxide semiconductor layer may be formed in a deposition chamber which is evacuated with use of a cryopump whereby the impurity concentration is reduced.

A method for producing a Ga-containing group III nitride semiconductor having reduced threading dislocation is disclosed. A buffer layer in a polycrystal, amorphous or polycrystal/amorphous mixed state, comprising AlGaN is formed on a substrate. The substrate having the buffer layer formed thereon is heat-treated at a temperature higher than a temperature at which a single crystal of a Ga-containing group III nitride semiconductor grows on the buffer layer and at a temperature that the Ga-containing group III nitride semiconductor does not grow, to reduce crystal nucleus density of the buffer layer as compared with the density before the heat treatment. After the heat treatment, the temperature of the substrate is decreased to a temperature that the Ga-containing group III nitride semiconductor grows, the temperature is maintained, and the Ga-containing group III nitride semiconductor is grown on the buffer layer.

A microelectronic assembly and method of making, which includes a first microelectronic element (including a substrate with first and second opposing surfaces, a semiconductor device, and conductive pads at the first surface which are electrically coupled to the semiconductor device) and a second microelectronic element (including a handler with first and second opposing surfaces, a second semiconductor device, and conductive pads at the handler first surface which are electrically coupled to the second semiconductor device). The first and second microelectronic elements are integrated such that the second surfaces face each other. The first microelectronic element includes conductive elements each extending from one of its conductive pads, through the substrate to the second surface. The second microelectronic element includes conductive elements each extending between the handler first and second surfaces. The conductive elements of the first microelectronics element are electrically coupled to the conductive elements of the second microelectronics element.

A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.

A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.

When forming sophisticated semiconductor-based gate electrode structures of transistors, the pre-doping of one type of gate electrode structure may be accomplished after the actual patterning of the electrode material by using an appropriate mask or fill material for covering the active regions and using a lithography mask. In this manner, a high degree of flexibility is provided with respect to selecting an appropriate patterning regime, while at the same time a uniform and superior cross-sectional shape for any type of gate electrode structure is obtained.

A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed. An oxide semiconductor film formed in this manner is used for an active layer of the transistor.

A method for forming an amorphous semiconductor which contains an impurity element and has low resistivity and a method for manufacturing a semiconductor device with excellent electrical characteristics with high yield are provided. In the method for forming an amorphous semiconductor containing an impurity element, which utilizes a plasma CVD method, pulse-modulated discharge inception voltage is applied to electrodes under the pressure and electrode distance with which the minimum discharge inception voltage according to Paschen's Law can be obtained, whereby the amorphous semiconductor which contains an impurity element and has low resistivity is formed.

A protective film to a polarizer including a cellulose acylate and satisfying the following requirement (1) or (2): (1): The surface of the film has a pH of from 3.0 to 4.5.(2): The surface of the film has a pH of more than 4.5 and at most 6.0, and the film has a moisture permeability of at least 2800 g/m2·day.

In a semiconductor device, where, with respect to a parasitic resistor in a current mirror circuit, a compensation resistor for compensating the parasitic resistor is provided in the current mirror circuit, the current mirror circuit includes at least two thin film transistors. The thin film transistors each have an island-shaped semiconductor film having a channel formation region and source or drain regions, a gate insulating film, a gate electrode, and source or drain electrodes, and the compensation resistor compensates the parasitic resistor of any one of the gate electrode, the source electrode, and the drain electrode. In addition, each compensation resistor has a conductive layer containing the same material as the gate electrode, the source or drain electrodes, or the source or drain regions.

A vehicular imaging and display system includes a rear backup camera at a rear portion of a vehicle, a video processor for processing image data captured by the rear camera, and a video display screen responsive to the video processor to display video images. During a reversing maneuver of the equipped vehicle, the video display screen displays video images captured by the rear camera. During forward travel of the equipped vehicle, the video display screen is operable to display images representative of a portion of the field of view of the rear camera to display images representative of an area sideward of the equipped vehicle responsive to at least one of (a) actuation of a turn signal indicator of the vehicle, (b) detection of a vehicle in a side lane adjacent to the equipped vehicle and (c) a lane departure warning system of the vehicle.

A sensor substrate includes a blocking pattern disposed on a base substrate, a first electrode disposed on the base substrate and overlapping the blocking pattern, the first electrode including a plurality of first unit parts arranged in a first direction, each of the first unit parts including a plurality of lines connected to each other in a mesh-type arrangement, a color filter layer disposed on the base substrate, a plurality of contact holes defined in the color filter layer and exposing the first unit parts, and a bridge line between and connected to first unit parts adjacent to each other in the first direction, through the contact holes.

Provided is a liquid crystal display including, on an insulation substrate having a polygonal display area and a peripheral area surrounding the display area a first signal line, a second signal line crossing the first signal line, a plurality of switching elements connected to the first signal line and the second signal line and disposed in the display area, a plurality of pixel electrodes each connected to the switching element and disposed in the display area, and a shielding conductor disposed in the peripheral area and extending along at least one side of the polygonal display area.

In a semiconductor device, a first interlayer insulating layer made of an inorganic material and formed on inverse stagger type TFTs, a second interlayer insulating layer made of an organic material and formed on the first interlayer insulating layer, and a pixel electrode formed in contact with the second interlayer insulating layer are disposed on a substrate, and an input terminal portion that is electrically connected to a wiring of another substrate is provided on an end portion of the substrate. The input terminal portion includes a first layer made of the same material as that of the gate electrode and a second layer made of the same material as that of the pixel electrode. With this structure, the number of photomasks used in the photolithography method can be reduced to 5.

Provided is a back plate component having reflective sheet reinforcing structure. The back plate component includes: a frame, a reflective sheet and a plurality of supporting film sheets. The frame includes a plurality of lateral beams and vertical beams, and at least one hollow part is included between the lateral beams and the vertical beams. The reflective sheet is attached to the frame, and includes a reflective surface and a back surface corresponding to the reflective surface. A portion of the back surface covers the whole hollow part. The plurality of supporting film sheets is attached to the back surface at a region corresponding to the hollow part, and includes a material the same as that of the reflective sheet. A liquid crystal display device is further disclosed herein.

The present invention provides an optical compensated bending (OCB) mode liquid crystal display (LCD) panel and a method for manufacturing the same. The method comprises the following steps: forming alignment layers on substrate, respectively; forming a liquid crystal layer between the alignment layers to form a liquid crystal cell; applying an electrical signal across the liquid crystal cell; and irradiating light rays to or heating the liquid crystal cell, so as to form a first polymer alignment layer and a second polymer alignment layer, respectively. The present invention can reduce a phase transition time of liquid crystal molecules from a splay state to a bent state.

A counter substrate for liquid crystal display includes a transparent substrate, a black matrix, and stripe transparent electrodes. The black matrix divides a plane surface of the transparent substrate into pixel or sub-pixel unit to form a light-shielded area and openings above the plane surface. The stripe transparent electrodes are formed into the pixel unit or the sub-pixel unit above the plane surface. The black matrix includes a frame pattern including two sides facing each other in parallel in the pixel or the sub-pixel unit, and a linear central pattern which is parallel to the two sides of the frame pattern and is formed at a midsection of the pixel or the sub-pixel unit. The transparent electrodes are each parallel to the two sides of the frame pattern and the central pattern and are located symmetrically to the central pattern.

The present invention provides a display device substrate, a display device substrate manufacturing method, a display device, a liquid crystal display device, a liquid crystal display device manufacturing method and an organic electroluminescent display device that allow suppressing faults derived from occurrence of gas and/or bubbles in a pixel region. The present invention is a display device substrate that comprises: a photosensitive resin film; and a pixel electrode, in this order, from a side of an insulating substrate. The display device substrate has a gas-barrier insulating film, at a layer higher than the photosensitive resin film, for preventing advance of a gas generated from the photosensitive resin film, or has a gas-barrier insulating film, between the photosensitive resin film and the pixel electrode, for preventing advance of gas generated from the photosensitive resin film.

The present invention discloses a tape substrate for chip on film structure of a liquid crystal panel. The tape substrate is provided with plural package units of chip on film structures arranged along its longitudinal direction, and the package unit has a driver chip, input leads and output leads. The longitudinal direction of the driver chip is parallel to the longitudinal direction of the tape substrate, and the input leads and the output leads are located at the two opposite sides of the driver chip. Each package unit is set up with a short side and a long side, and the input leads are formed at the short side, while the output leads are formed at the long side. In the package units adjacent to each other, the short side of one package unit joins the long side of a next package unit. This invention further discloses a liquid crystal panel having the tape substrate.

Embodiments of the disclosed technology relate to a color filter substrate and a method of manufacturing the same. The color filter substrate comprises a base substrate having a black matrix pattern thereon, the black matrix pattern having a plurality of openings; and a plurality of color filter layers in different colors, disposed on the base substrate and located at the openings of the black matrix pattern, the color filter layers being glass layers in different colors.

A liquid crystal display panel, including: a pixel electrode formed on a first substrate; an alignment layer formed on the pixel electrode, wherein the alignment layer includes an alignment layer material and aligns first liquid crystal molecules in a direction substantially perpendicular to the pixel electrode; and a photo hardening layer formed on the alignment layer, wherein the photo hardening layer includes a photo hardening layer material and aligns second liquid crystal molecules to be tilted with respect to the pixel electrode, wherein the alignment layer material and the photo hardening layer material have different polarities from each other.

The liquid crystal display device includes an island-shaped first semiconductor film 102 which is formed over a base insulating film 101 and in which a source 102d, a channel forming region 102a, and a drain 102b are formed; a first electrode 102c which is formed of a material same as the first semiconductor film 102 to be the source 102d or the drain 102b and formed over the base insulating film 101; a second electrode 108 which is formed over the first electrode 102c and includes a first opening pattern 112; and a liquid crystal 110 which is provided over the second electrode 108.

The liquid crystal display device includes an island-shaped first semiconductor film 102 which is formed over a base insulating film 101 and in which a source 102d, a channel forming region 102a, and a drain 102b are formed; a first electrode 102c which is formed of a material same as the first semiconductor film 102 to be the source 102d or the drain 102b and formed over the base insulating film 101; a second electrode 108 which is formed over the first electrode 102c and includes a first opening pattern 112; and a liquid crystal 110 which is provided over the second electrode 108.

An optical element includes at least two stacked birefringent layers having respective local optical axes that are rotated by respective twist angles over respective thicknesses of the at least two layers, and are aligned along respective interfaces between the at least two layers. The respective twist angles and/or the respective thicknesses are different. The at least two stacked birefringent layers may be liquid crystal polymer optical retarder layers. Related devices and fabrication methods are also discussed.

According to one embodiment, a first gene encodes a reporter protein. The first gene is disposed at the downstream of the gene promoter. A second gene is disposed at the downstream of the gene promoter and encodes a replication origin-binding protein. An internal ribosome entry site is disposed between the first gene and the second gene. The transcription termination signal sequence encodes a signal for terminating the transcription of the first gene and the second gene. A replication origin sequence is recognized by the replication origin-binding protein.

The present invention relates to the generation of a mucin-producing cell using stem/progenitor cells obtained from the amniotic membrane of umbilical cord and therapeutic uses of such mucin-producing cells.

Methods and devices for separating fluid-suspended plant somatic embryos and embryogenic tissue based on differences in their fluid drag properties are disclosed. Deposition method and device for depositing plant somatic embryos into embryo receiver comprising growth substrate by means of a fluid jet is disclosed. An automated system for processing plant somatic embryos from the bioreactor to the growth substrate is also disclosed.

A multi-channel system and methods for sorting particles according to one or more characteristics of the particles. The system includes multiple flow cytometry units, each unit can have a nozzle for producing a fluid stream containing a desired population of particles in a mixture of particles. Each of the units may be operable to sort said desired population of particles by interrogating the fluid stream with a beam of electromagnetic radiation and classifying particles based on one or more characteristics of the particles. The system also includes a common fluid delivery system for delivering sheath fluid to each flow cytometer unit for producing respective fluid streams.

The invention provides an improved design for the construction of extensible nucleic acid-based, ligand-controlled regulatory systems, and the nucleic acid regulatory systems resulting therefrom. The invention contemplates improving the design of the switches (ligand-controlled regulatory systems) through the design of an information transmission domain (ITD). The improved ITD eliminates free-floating ends of the switching and the competing strands, and localizes competitive hybridization events to a contiguous strand of competing and switching strands in a strand-displacement mechanism-based switch, thereby improving the kinetics of strand-displacement. The improved regulatory systems have many uses in various biological systems, including gene expression control or ligand-concentration sensing.

Methods and agents for reducing a level of an acetylated Tau polypeptide in a cell are provided. Methods for treating a tauopathy in an individual are also provided. Also provided is a method for diagnosing a cognitive impairment disorder in an individual. Methods for identifying an agent suitable for treating a tauopathy are also provided.

The invention discloses novel morphology shifting micelles and amphiphilic coated metal nanofibers. Methods of using and making the same are also disclosed.

The invention is directed to a single-step method for rapidly and efficiently preparing protein-polymer conjugates, including an insulin-polymer conjugate. According to the method of the present invention, a protein and hydrophilic polymer are contacted in the presence of at least one organic solvent and at least one metal chelator, under conditions that promote the formation of a conjugate of the protein and polymer. Thus, the invention is directed to the site-specific modification of selected proteins, such as insulin, with poly(ethylene glycol) at residue PheB1. The invention also provides a pharmaceutical formulation for encapsulating the conjugate in a biodegradable polymer.

Monoclonal antibodies (mAbs) having thyroid stimulating activity (TSAb), especially full or considerably agonistic activity, or thyroid blocking activity (TBAb), which are obtainable by genetic immunization of mice, or fragments (F(ab')2, Fab or Fv) or humanized forms of such monoclonal antibodies or single chain forms (SCA; scFv) of such fragments, which antibodies, or their fragments, compete with bovine TSH for epitopes of the human TSHr, compete with autoantibodies from sera from Graves' patients as well as with autoantibodies from sera from patients harboring blocking autoantibodies for epitopes of the human TSHr, bind to conformational epitopes of the human TSHr located in the first 281 amino acids of the human TSHr, and usually also bind to TSFR receptors (TSHr) from different animals. Various uses of such antibodies, or of peptides corresponding to variable regions of such antibodies, are also described and claimed.

Devices and methods are provided for reducing matrix effects in protein precipitated bioanalytical samples comprising: a support, and a sorbent associated with the support capable of binding matrix interfering agents present in the bioanalytical sample, wherein the device further comprises filtering means for removing precipitated protein particles. The filtering means is a size exclusion filter or a polymeric or inorganic monolith having a maximum pore size less than or equal to the diameter of the particles to be removed from the sample, and can be integral with the sorbent or associated with the sorbent. The sorbent is characterized by sufficient selectivity between the matrix interfering agents and analytes of interest to provide retention of the matrix interfering agents while providing elution of the analytes of interest (e.g., a reversed phase or a polar modified reversed phase). Typical devices incorporating these features include luer syringe filters, individual filter cartridges, multiwell plates, pipette tips, or inline columns for multiple or single use.

Described herein are techniques for assembling a polynucleotide encoding a transcription activator-like effector nucleases (TALEN). The techniques ligate and digest necessary modules for a TALEN assembly in one reactor or system. Methods and Kits for generating a TALEN are also described.

The invention relates to methods and compositions for identifying and selecting maize plants with enhanced resistance to northern leaf blight. Maize plants generated by the methods of the invention are also a feature of the invention.

This invention provides recombinant DNA constructs and methods for manipulating expression of a target gene that is regulated by a small RNA, by interfering with the binding of the small RNA to its target gene. More specifically, this invention discloses recombinant DNA constructs encoding cleavage blockers, 5-modified cleavage blockers, and translational inhibitors useful for modulating expression of a target gene and methods for their use. Further disclosed are miRNA targets useful for designing recombinant DNA constructs including miRNA-unresponsive transgenes, miRNA decoys, cleavage blockers, 5-modified cleavage blockers, and translational inhibitors, as well as methods for their use, and transgenic eukaryotic cells and organisms containing such constructs.

The invention relates to genes coding for TCP family transcription factors and having a biological role in the development of axillary buds and branch growth. Furthermore, the invention relates to the promoters of the transcription of said genes, to the genetic constructs containing same and to the uses thereof, including the use of agents that modulate the expression of these genes in order to modify plant architecture.

The present invention provides an inbred corn line designated FX6815, methods for producing a corn plant by crossing plants of the inbred line FX6815 with plants of another corn plant. The invention further encompasses all parts of inbred corn line FX6815, including culturable cells. Additionally provided herein are methods for introducing transgenes into inbred corn line FX6815, and plants produced according to these methods.

The present invention provides an inbred corn line designated FF7354, methods for producing a corn plant by crossing plants of the inbred line FF7354 with plants of another corn plant. The invention further encompasses all parts of inbred corn line FF7354, including culturable cells. Additionally provided herein are methods for introducing transgenes into inbred corn line FF7354, and plants produced according to these methods.