A three-dimensional platform comprising a tessellated surface of pieces, each piece comprising a top and sides. The pieces comprise a fixed square piece having at least two opposing sides orientated acutely relative to the top to define a fixed square retention surface. The remaining surfaces orientate substantially perpendicular relative to the top. There is a mobile square piece having at least two opposing sides orientated obtusely relative to the top to define a mobile square retention surface. The remaining surfaces are oriented substantially perpendicular relative to the top. A mobile triangular piece having all sides orientated obtusely relative to the top. The fixed square retention surface indexes only with either the mobile square retention surface or the triangular piece surface to effect retention of the pieces to define the three-dimensional platform.

A ballistic picture frame for holding two dimensional paper targets, photographs or print art used for dry-fire training. The ballistic picture frame holds paper targets, photographs, or other two dimensional graphics or prints like conventional picture frames, but also provides a ballistic barrier for enhanced safety during dry-fire training. The ballistic frame includes a back panel constructed of ballistic materials that prevent projectile penetration through the frame in the event of a negligent discharge.

A portable control module autonomously positions a target deployed in a combat simulation course. The module chassis is bullet-resistant and angled to deflect errant shots, and encloses a control circuit having an adjustable target exposure delay, an adjustable target exposure duration, means for receiving a trigger signal representing movement of a human body, means for revealing the target when the exposure delay lapses after triggering, means for enabling, only when the target is revealed, hit detection means detecting a shot striking the target, and means for concealing the target responsive to earliest occurrence of the shot detection or lapse of the target exposure duration. The module may include means for relaying the trigger signal to other modules within a cooperative decentralized target control system. A method for the autonomous position control is also disclosed.

The disclosure refers to a control device and method for an intelligent basketball shooting machine, the device includes a control module, a blue-tooth communication module, a display module, a control switch, a power-supplying module, and a first sensor and a second sensor both for counting; the first sensor is used for catching amount of goals in one basket of basketball shooting machine, and the second sensor used for catching amount of goals in another basket of basketball shooting machine; the first sensor, second sensor, blue-tooth communication module, display module, control switch and power-supplying module are respectively connected with control module; the disclosure makes the basketball shooting machine go on single game or online game, besides, the player can play the shooting game with friends by remote way just through an intelligent terminal, which increases interest and convenience.

Card handling devices may include a card shuffling apparatus and a card output portion having a card buffer area positioned at an interface of the card shuffling apparatus and the card output portion. The card output portion may be configured to move relative to the card shuffling apparatus and alter the orientation of the card buffer area. Card handling devices having a substantially flat card output area may include an interface portion having an at least substantially flat draw surface. The substantially flat card output area may permit playing cards to be drawn from an outlet of the substantially flat card output area in a plurality of at least substantially horizontal directions. Methods of shuffling playing cards may include altering an orientation of a card buffer area and inserting cards into the card buffer area at both a top and a bottom of a group of cards within the card buffer area.

A novelty apparel includes multiple attached conformable, selectable and viewable occupational role playing indicia. A baseball cap includes a dome shaped crown of compound curves and a forward facing sun visor brim portion, a display region in a central front face portion of the dome shaped crown, where the display region displays a first permanent occupational status identifier and a mounting region for a secondary occupational status identifier selectable from a number of different indicia carried on a display surface conformable to said dome shaped crown. The selected indicium is displayed centered above the brim. The display surface conforms to the curved exterior of the dome shaped crown, wherein the baseball cap does not deviate substantially from the look of a typical baseball cap with a single permanent indicium.

An outer plastic tube has water connections through the wall into an annular space defined by an O-ring spacer-gasket positioned between the wall and the perimeter margin of an inner cylinder rolled from a single-layer of sheet metal. A metal drainpipe with a removable bullet-shape at one end is forced through the cylinder to expand it and to thereby compress the gasket sealing the annular space. Thermal contact conductance is increased by the compressive force of water pressure. Water flow through the heat exchanger is both annular and turbulent to optimize heat transfer.

A heat exchanger may include at least one fluid passageway adjacent a heat transfer plate and a plurality of heat transfer elements positioned in the at least one fluid passageway and joined with the heat transfer plate. The heat transfer elements may be positioned with first spacings therebetween at an inlet end of the at least one fluid passageway. The heat transfer elements may be positioned with second spacings therebetween at an outlet end of the at least one fluid passageway. The first spacings may be smaller than the second spacings.

The present application relates to a system for dynamic control of the operation of a heat exchanger, the system comprising a heat exchanger, a plurality of injector arrangements, a local sensor arrangement, and a controller, wherein the local sensor arrangement comprises a plurality of local temperature sensors being arranged to measure temperature values; and wherein the controller is arranged to determine a difference between the measured temperature values and is further arranged to communicate with the valves of the plurality of injector arrangements to adjust the local amount of first fluid supplied by at least one of the injector arrangements in order to even out the determined difference. The application also relates to a method for the dynamic control of the operation of a heat exchanger in such a system.

Disclosed is a housing for electronic/electrical that includes an inner panel and an outer panel, a strip of metal plate, and a strip of shape memory material. The inner panel and the outer panel are disposed parallel to each other at regular intervals to define an internal space. The strip of metal plate extends from an inner surface of the outer panel. The strip of shape memory material extends from an inner surface of the inner panel and is attached or detached to/from the metal plate on the outer panel while changing into an original straight shape or a bent shape according to a temperature variation. Here, when the temperature increase beyond a first transition temperature, the shape memory material straightens to form a heat transfer path. At a low temperature environment, the shape memory material bends and is separated from the metal plate to interrupt the heat transfer path.

A heat-insulating shroud for facilitating temperature control of a heated article includes a flexible cover, made from a heat-insulating material, for covering a surface of the heated article, at least one air inlet defined in a first section of the flexible cover, and at least one air outlet defined in a second section of the flexible cover. In a cooling mode of operation, the flexible cover defines an air channel over the surface of the heated article for channeling an air stream from the air inlet(s) over the surface of the heated article towards the air outlet(s). The channeling of the air stream facilitates cooling the heated article. In a heat-conservation mode of operation, the flexible cover of heat-insulating material insulates the heated article from heat loss. Each air outlet may have a closure that opens during the cooling mode of operation and closes during the heat-conservation mode of operation.

Provided is an air-conditioning device for a vehicle, including: a cooling device configured to cool air passing through a duct; a heater core, which is arranged in the duct on a downstream side of airflow with respect to the cooling device, and is configured to use an engine coolant as a heat source to heat the air; a water valve provided in a coolant circulation system on an upstream side of the heater core; and a controller configured to control those components, in which the controller is configured to decrease an opening amount of the water valve in a predetermined cooling mode. The control is configured to, when the opening amount of the water valve is decreased, decrease a rotational speed of a compressor of the cooling device, and increase a target evaporator temperature of an evaporator of the cooling device, thereby decreasing cooling performance of the cooling device.

A wall-mounted air conditioner indoor unit includes a housing having a front housing and a rear housing, main air intake portions formed on the housing, a mixed air outlet formed on a lower portion of the front housing, a non-hot exchange air inlet formed on the rear housing, and an air delivery apparatus disposed inside the housing. The hot exchange air passage has an upper portion with a size greater than that of its lower portion. A volute and a centrifugal fan located inside the volute are disposed inside the housing and above the air delivery apparatus. An air output portion of the volute faces the hot exchange air passage, and includes a surrounding portion extending to the air delivery apparatus and surrounding the hot exchange air passages, and air mixed cavities are formed between the surrounding portion and the hot exchange air passages.

To provide a solution conveying and cooling apparatus that enables removal of a deposit of solid material, or a fouling deposit, inside the apparatus with extremely simple work equipment by fewer on-site workers in a short tune without any dangerous work such as hydroblasting. The solution conveying and cooling apparatus has a rigid outer tube for a cooling medium and a plurality of rigid outer tubes for solution arranged parallel to each other inside the rigid outer tube for a cooling medium. A thin inner tube is disposed inside each of the rigid outer tubes for solution, this thin inner tube having an outer diameter smaller than an inner diameter of the rigid outer tube for solution at normal temperature and pressure, and expanding by an increase in at least one of temperature and pressure of a solution conveyed and as a result contacting with an inner surface of the rigid outer tube for solution that is cooled by the cooling medium.

A heat transfer system includes a substrate having a heat exchange region including a surface having an enhancement region including alternating regions of selectively placed plurality of nucleation sites and regions lacking selectively placed nucleation sites, such that bubble formation and departure during boiling of a liquid in contact with the enhancement region induces liquid motion over the surface of the regions lacking selectively placed nucleation sites sufficient to enhance both critical heat flux and heat transfer coefficient at the critical heat flux in the enhancement region of the system.

Coatings for enhancing performance of materials surfaces, methods of producing the coating and coated substrates, and coated condensers are disclosed herein. More particularly, exemplary embodiments provide chemical coating materials useful for coating condenser components.

A heat dissipation module adapted to perform heat dissipation on a heat generating component is provided. The heat dissipation module includes a graphite sheet and an insulating and heat conducting layer. The graphite sheet includes a plurality of through holes, an attaching surface and a heat dissipating surface opposite to the attaching surface, wherein the attaching surface is configured to be attached to the heat generating component. Each of the through holes penetrates the graphite sheet, so the attaching surface and the heat dissipating surface are connected via the through holes. The insulating and heat conducting layer covers the graphite sheet. The insulating and heat conducting layer least covers the attaching surface, the heat dissipating surface and inner walls of the through holes.

Provided are a heat recovery apparatus based on a fuel cell and an operating method thereof. In the fuel cell-based heat recovery apparatus and the operating method thereof, hot water and steam may be generated by using heat generated while a molten carbonate fuel cell (MCFC) operates to supply the generated hot water or steam to buildings, thereby reducing a rate of operation in cooling/heating equipment using electricity so as to reduce air-conditioning costs.

A Rack Information Handling System (RIHS) has a liquid cooling subsystem that provides cooling liquid to liquid cooled (LC) nodes received in chassis-receiving bays of a rack. Leak collection structures are positioned to receive cooling liquid that leaks from the liquid cooling subsystem. Liquid sensors detect a presence of leaked cooling liquid in the leak collection structures. A leak detection subsystem responds to a detected presence of liquid by providing a leak indication. In one or more embodiments, the liquid cooling subsystem has a liquid rail formed by more than one rack interconnections vertically aligned in a rear section of the rack that are connected by modular rail conduits for node-to-node fluid transfer. The leak collection structures include a pipe cover received over at least one modular rail conduit. A liquid cavity of each pipe cover spills over into another lower pipe cover at a rate that can be correlated to severity of the leak.

There is disclosed a vehicle air conditioner which is capable of enlarging an effective range of a dehumidifying and heating mode to environmental conditions and smoothly dehumidifying and heating a vehicle interior. A vehicle air conditioner 1 executes a dehumidifying and heating mode in which a controller lets a refrigerant discharged from a compressor 2 radiate heat in a radiator 4, and decompresses the refrigerant by which heat has been radiated and then lets the refrigerant absorb heat in a heat absorber 9 and an outdoor heat exchanger 7, the controller decreases an outdoor blower voltage FANVout of an outdoor blower 15 and decreases an air volume into the outdoor blower 15 in a case where a temperature Te of the heat absorber 9 is high even when the controller adjusts a valve position of an outdoor expansion valve 6 into a lower limit of controlling in a situation in which a temperature TCI of the radiator 4 is satisfactory.

An air conditioning system of a motor vehicle with a refrigerant circuit for operation in a refrigerator mode and a heat pump mode. The refrigerant circuit includes a primary circuit with a compressor, a heat exchanger for heat transfer between the refrigerant and the surroundings, an expansion element and a heat exchanger for heat transfer from the intake air being conditioned for the passenger compartment to the refrigerant, and a first flow path. The flow path extends from a branching point between the compressor and the heat exchanger to an opening and includes a heat exchanger for heat transfer from the refrigerant to the intake air being conditioned for the passenger compartment. The heat exchanger is situated in a flow direction of intake air of the passenger compartment after the heat exchanger.

An adjustable refrigerant distribution device and a heat exchanger having same. The heat exchanger comprises: first and second collecting pipes; a heat exchanger core body; and a refrigerant distribution device, the refrigerant distribution device comprises a first distribution pipe, a first inlet pipe and a first drive assembly. The pipe wall of the first distribution pipe is provided with a first distribution hole. The first distribution pipe is inserted into at least one of the first and the second collecting pipes. The first inlet pipe is located outside at least one collecting pipe and is in communication with the first distribution pipe, and the first drive assembly drives the first distribution pipe to move relative to at least one collecting pipe. The distribution pipe of the refrigerant distribution device and the heat exchanger can translate along the axial direction, thereby adjusting refrigerant distribution so as to satisfy different distribution requirements.

In a cooled component system, a heat exchanger mounted on a surface of the industrial component is housed in an isolated access compartment adjacent to but separated from the primary compartment containing the industrial component. Housing the heat exchanger in a separately accessible compartment permits access to the heat exchanger for cleaning or other purposes without having to shut down the industrial component being cooled. A means for moving a cooling media over the surface a the heat exchanger might also be included to maximize heat exchange.

An electronic rack includes a housing to contain one or more IT components arranged in a stack, a first rack aisle formed on a first side of the one or more IT components to direct cooler air received from the cooling unit upwardly, and a second rack aisle formed on a second side of the one or more IT components to direct warmer air to the cooling unit downwardly. The electronic rack further includes a cooling unit having one or more cooling units disposed underneath the IT components to receive first liquid from an external chiller system, to exchange heat carried by the warmer air using the first liquid to generate the cooler air, to transform the first liquid into a second liquid with a higher temperature, and to transmit the second liquid carrying the exchanged heat back to the external chiller system.

A rack airflow monitoring system is configured to measure airflow through an equipment rack having a housing and a perforated front door to enable air to flow into an interior of the housing. The system includes a control module, and a plurality of airflow sensors secured to the front door of the equipment rack and coupled to the control module. Each airflow sensor is configured to detect a parameter used to measure airflow and communicate detected parameters to the control module. The control module is configured to obtain temperature, airflow velocity, and airflow directionality from the plurality of airflow sensors at the front door of the equipment rack.

A digital down converter with an equalizer translates an ADC output signal to a low frequency spectral region, followed by decimation. All operations of correction of the processed signal are carried out with a reduced sampling rate compared with sampling rates of the prior art. Equalization is performed only in a frequency pass band of the down converter. The achieved reduction of the required computation resources is sufficient to enable the down converter with equalization to operate in a real time mode.

Methods and apparatus to parallelize data decompression are disclosed. An example method adjusting a first one of initial starting positions to determine a first adjusted starting position by decoding the bitstream starting at a training position in the bitstream, the decoding including traversing the bitstream from the training position as though first data located at the training position is a valid token; and merging, by executing an instruction with the processor, first decoded data generated by decoding a first segment of the compressed data bitstream starting from the first adjusted starting position with second decoded data generated by decoding a second segment of the compressed data bitstream, the decoding of the second segment starting from a second position in the compressed data bitstream and being performed in parallel with the decoding of the first segment, and the second segment preceding the first segment in the compressed data bitstream.

A circuit includes a time delta detector configured to receive an input clock signal and a reference clock signal and generate a delta pulse signal and a reference pulse signal. A comparison circuit is configured to receive the delta pulse signal and the reference pulse signal. The comparison circuit generates an output indicative of a bit of a time difference between the input clock signal and the reference clock signal. A control circuit is configured to receive the output from the comparison circuit. The control circuit maintains a count of the time difference between the input clock signal and the reference clock signal.

The pulse width modulator includes a subtraction unit configured to perform subtraction between an m value digital signal and a pulse width modulation signal; a feedforward filter unit configured such that a ΔΣ modulator to which an output signal of the subtraction unit is input and which includes integrators of a second order or higher is in cascade connection, and configured to operate with a sampling frequency FS; a product-sum computing unit configured to operate with a sampling frequency (FS/n) (n: an integer of two or more) to perform product-sum computing of an output signal of each integrator of the feedforward filter unit; and a pulse width modulation unit configured to operate with the sampling frequency (FS/n) to perform pulse width modulation of an output signal of the product-sum computing unit to output a pulse width modulation signal.

A level shifter circuit includes a level shifting unit configured to receive signals that may vary in a first range via a positive input terminal and a negative input terminal, respectively and to output signals that may vary in a second range to a positive output terminal and a negative output terminal, respectively, where the second range is larger than the first range, a first pre-charging unit configured to pre-charge the positive output terminal to a predetermined level when a clock is in a first level, and a second pre-charging unit configured to pre-charge the negative output terminal to the predetermined level when the clock is in the first level.

A method for adaptively regulating a coding mode and a digital correction circuit thereof are provided. The method is for a successive-approximation-register analog-to-digital converter (SAR ADC). In the method, whether to regulate a binary weight corresponding to each of digital bits is determined according to the number of completed comparison cycles to provide a first coding sequence. The first coding sequence is directly compensated according to uncompleted comparison cycles to provide a correct digital output code.

Disclosed are an apparatus and method for compressing continuous data. The apparatus for compressing continuous data may include a data generator configured to calculate differences between adjacent values in original continuous data and generate data based on the calculated differences.

A codeset having function-code combinations is provisioned on a controlling device to control functions of an intended target device. Input is provided to the controlling device which designates a function to be controlled on the intended target device. From a plurality of codes that are each associated with the designated function in a database stored in a memory of the controlling device a first code that is determined to be valid for use in controlling the designated function on the intended target device is selected. When the codeset is then provisioned on the controlling device, the provisioned codeset includes as a function-code combination thereof the designated function and the first code.

An analog to digital converter (ADC) system that includes a first amplifier configured to amplify an analog input signal to produce an amplified direct current (DC) signal, an ADC configured to receive the amplified DC signal and convert the amplified DC signal into a digital DC signal, a digital to analog converter configured to receive the digital DC signal and convert the digital DC signal into an analog DC signal, and a second amplifier configured to receive an analog alternating current (AC) signal comprising the analog DC signal subtracted from the analog input signal and amplify the analog AC signal to produce an amplified AC signal. The ADC is further configured to receive the amplified AC signal and produce a digital AC signal. The second amplifier has a gain greater than a gain of the first amplifier.

An input buffer for an ADC is provided. The input buffer includes a receiving circuit and an impedance circuit. The receiving circuit is coupled between a power supply and a sample-and-hold circuit of the ADC, and receives an analog input signal and generating an analog signal. The impedance circuit is coupled to the receiving circuit, and selectively provides a variable impedance. When the sample-and-hold circuit of the ADC is operated in a first phase, the impedance circuit provides a small impedance, and when the sample-and-hold circuit of the ADC is operated in a second phase, the impedance circuit provides a large impedance.

A multi-level DAC includes first and second level resistor ladders, and a dual-switch ladder interconnect reduces DNL at tap-point transitions between first-level ladder resistors. For each first level resistor N, the switch-interconnect network includes dual (first/second) switches connectable to a resistor-top node NT, and dual (third/fourth) switches selectively connectable to a resistor-bottom node NB. The first switch is operable to connect NT to a top tap switch operable to select NT as a top tap point, and the fourth interconnect switch is operable to connect NB to a bottom tap switch operable to select NB as a bottom tap point. The first and fourth switches are connected, forming an outer loop that includes top and bottom tap points. The second switch connects to a top second-level resistor RT, and the third switch connects to a bottom second-level resistor RB, forming an inner loop that includes the series-connected second-level resistors.

Disclosed are methods and systems for significantly compressing sparse multidimensional ordered series data comprised of indexed data sets, wherein each data set comprises an index, a first variable and a second variable. The methods and systems are particularly suited for compression of data recorded in double precision floating point format.

A digital-to-analog converter (DAC) and a high-voltage tolerance circuit are provided. The DAC includes a high-voltage tolerance circuit. The high-voltage tolerance circuit is configured to generate a reference voltage, and select the reference voltage or a first power-source voltage to control the node voltage of each branch of an operational amplifier circuit of the high-voltage tolerance circuit according the logical signal level of an input signal.

An ultrasound device including an asynchronous successive approximation analog-to-digital converter and method are provided. The device includes at least one ultrasonic transducer, a plurality of asynchronous successive-approximation-register (SAR) analog-to-digital converters (ADC) coupled to the at least one ultrasonic transducer, at least one asynchronous SAR in the plurality having a sample and hold stage, a digital-to-analog converter (DAC), a comparator, and control circuitry, wherein a DAC update event following at least one bit conversion is synchronized to a corresponding DAC update event of at least one other ADC in the plurality of ADCs.

Methods and systems for time interleaved analog-to-digital converter timing mismatch calibration and compensation may include receiving an analog signal on a chip, converting the analog signal to a digital signal utilizing a time interleaved analog-to-digital-converter (ADC), and reducing a blocker signal that is generated by timing offsets in the time interleaved ADC by estimating complex coupling coefficients between a desired digital output signal and the blocker signal utilizing a decorrelation algorithm on frequencies within a desired frequency bandwidth. The decorrelation algorithm may comprise a symmetric adaptive decorrelation algorithm. The received analog signal may be generated by a calibration tone generator on the chip. An aliased signal may be summed with an output signal from a multiplier. The complex coupling coefficients may be determined utilizing the decorrelation algorithm on the summed signals. A multiplier may be configured to cancel the blocker signal utilizing the determined complex coupling coefficients.

A semiconductor device configured to perform an A/D conversion of a wide range of signals is provided. A semiconductor device includes: an input voltage detection unit configured to detect an analog input voltage; a reference voltage setting unit configured to set a reference voltage based on the detected input voltage; an amplifier configured to amplify a difference between the input voltage and the reference voltage; an ADC configured to perform an A/D conversion of an amplified signal; and an arithmetic processing unit configured to calculate a digital voltage corresponding to the input voltage based on a result of the A/D conversion and the reference voltage.

A hybrid SAR-ADC that uses a combination of voltage-based signal processing and time-based signal processing to convert an analog input signal to a digital output signal is disclosed. In some embodiments, the hybrid SAR-ADC has a voltage-based signal processing element configured to convert an analog input signal to a first digital signal having a plurality of MSBs and to generate a residue voltage from an input voltage and the first digital signal. A voltage-to-time conversion element is configured to convert the residue voltage to a time domain representation. A time-based signal processing element is configured to convert the time domain representation to a second digital signal comprising a plurality of LSBs. By determining the plurality of MSBs using voltage-based signal processing and determining the plurality of LSBs using time-based signal processing, the hybrid SAR-ADC is able to achieve low power and compact area.

A converter includes: a terminal that receives code-modulated power that has been generated with a modulation code; and a circuit that intermittently converts the code-modulated power with a conversion code based on the modulation code. The code-modulated power is alternating-current power.

Aspects of dynamic data compression selection are presented. In an example method, as uncompressed data chunks of a data stream are compressed, at least one performance factor affecting selection of one of multiple compression algorithms for the uncompressed data chunks of the data stream may be determined. Each of the multiple compression algorithms may facilitate a different expected compression ratio. One of the multiple compression algorithms may be selected separately for each uncompressed data chunk of the data stream based on the at least one performance factor. Each uncompressed data chunk may be compressed using the selected one of the multiple compression algorithms for the uncompressed data chunk.

An electronic apparatus and a method for detecting status of keys thereof are provided. The electronic apparatus comprises a key module, a key control circuit, a conversion circuit with calibration mechanism and a processor. The key control circuit detects whether any of keys in the key module is pressed. If the detection result is affirmative, the press status of each of the keys is scanned by the key control circuit to obtain a coarse scan result. The conversion circuit with calibration mechanism is configured to perform the other system function of the electronic apparatus. When the processor determines that at least one of the keys is not pressed according the coarse scan result, the conversion circuit with calibration mechanism is switched to assist a re-scan operation of the press status of the at least one of the keys.

Typically, complex systems require a separate and expensive equalizer at the output of an analog-to-digital converter (ADC). Rather than providing a separate equalizer, the effective Signal Transfer Function (STF) of a Multi-stAge noise SHaping (MASH) ADC can be modified by leveraging available digital filtering hardware necessary for quantization noise cancellation. The modification can involves adding calculations in the software previously provided for computing digital quantization noise cancellation filter coefficients, where the calculations are added to take into account equalization as well. As a result, the signal transfer function can be modified to meet ADC or system-level signal-chain specifications without additional equalization hardware. The method is especially attractive for high-speed applications where magnitude and phase responses are more challenging to meet.

Continuous-time analog-to-digital converters (ADCs) such as continuous-time delta-sigma ADCs and continuous-time pipeline ADCs, has input resistor structure at the input. The input resistor structure is typically tunable, and the tunability is usually provided by metal-oxide semiconductor field effect transistor (MOSFET) switches. Core MOSFETs, which has a terminal-to-terminal voltage

For continuous-time multi-stage noise shaping analog-to-digital converters (CT MASH ADCs), quantization noise cancellation often requires accurate estimation of transfer functions, e.g., a noise transfer function of the front end modulator and a signal transfer function of the back end modulator. To provide quantization noise cancellation, digital quantization noise cancellation filters adaptively tracks transfer function variations due to integrator gain errors, flash-to-DAC timing errors, as well as the inter-stage gain and timing errors. Tracking the transfer functions is performed through the direct cross-correlation between the injected maximum length linear feedback shift registers (LFSR) sequence and modulator outputs and then corrects these non-ideal effects by accurately modeling the transfer functions with programmable finite impulse response (PFIR) filters.

An analog-to-digital converter (ADC) is a device that can include a reference shuffler and a loop filter. An ADC can achieve better performance with incremental adjustment of a pointer of the reference shuffler, changing coefficients of the loop filter, and storing calibration codes of the ADC in a non-volatile memory. By incrementally adjusting a pointer of the reference shuffler, a calibration can be performed more efficiently than with a random adjustment of the pointer. By temporarily changing the loop filter coefficients, a greater amount of activity can be introduced into the loop filter. This activity can allow the calibration to proceed more efficiently. By storing the calibration codes in a non-volatile memory, a search space for calibration codes can be reduced. Thus, a calibration can occur more quickly, and the calibration itself can be improved.

A flash analog-to-digital converter (ADC) includes comparators that convert an analog input signal to a digital output signal. Offsets of these comparators introduce noise and can hurt the performance of the ADC. Thus, these comparators are calibrated using calibration codes. Conventional calibration methods determine these calibration codes by removing the ADC from an input signal. Otherwise, it is difficult to distinguish the noise from the signal in the calibration measurement. In contrast, an embodiment can determine the calibration codes while the ADC converts the input signal to a digital signal. Such an embodiment can be achieved by a frequency-domain technique. In an embodiment employing a frequency-domain power meter, an input signal can be removed from the power measurement. This removal enables accurate measurement of in-band noise without having the measurement be corrupted by input signal power.