By employing a two-tier load balancing scheme, embodiments of the present invention may reduce the overhead of shared resource management, while increasing the potential aggregate throughput of a thread pool. As a result, the techniques presented herein may lead to increased performance in many computing environments, such as graphics intensive gaming.

The present invention is directed to processes for the production of 1233zd from 240fa and HF, with or without a catalyst, at a commercial scale. The 240fa and HF are fed to a reactor operating at high pressure. The resulting product stream comprising 1233zd, HCl, HF, and other byproducts is treated to one or more purification techniques including phase separation and one or more distillations to provide purified 1233zd, which meets commercial product specifications, i.e., having a GC purity of 99.5% or greater.

The present invention relates to a process for separating chlorinated methanes utilizing a dividing wall column. Processes and manufacturing assemblies for generating chlorinated methanes are also provided, as are processes for producing products utilizing the chlorinated methanes produced and/or separated utilizing the present process(es) and/or assemblies.

The present invention provides a method for separating halocarbons. In particular, the invention provides a method for separating halogenated olefin impurities from 2-chloro-1,1,1,2-tetrafluoropropane (HCFC-244bb) using a solid adsorbent, particularly activated carbon. More particularly the invention pertains to a method for separating 2-chloro-3,3,3-trifluoro-propene (HCFO-1233xf) from HCFC-244bb, which are useful as intermediates in the production of 2,3,3,3-tetrafluoropropene (HFO-1234yf).

Provided is a process for making 2-chloro-1,1,1,2-tetrafluoropropane. The process has the step of hydrofluorinating 2-chloro-3,3,3-trifluoropropene in the presence of a catalyst selected from the group consisting of SbCl3, SbCl5, SbF5, TiCl4, SnCl4, Cr2O3, and fluorinated Cr2O3.

Fluorinated aromatic materials, their synthesis and their use in optoelectronics. In some cases, the fluorinated aromatic materials are perfluoroalkylated aromatic materials that may include perfluoropolyether substituents.

A method for producing fluorinated organic compounds, including hydrofluoropropenes, which preferably comprises converting at least one compound of formula (I): CF3(—CX2X2)nCX1═H2 (I) to at least one compound of formula (II): CF3(CX2X2)nCX1═H2 (II), where X1 is Cl, Br or I, each X2 is independently selected from the group consisting of H, Cl, F, Br or J, and n is 0, 1, or 2.

A process for making a fluorinated olefin having the step of dehydrochlorinating a hydrochlorofluorocarbon having at least one hydrogen atom and at least one chlorine atom on adjacent carbon atoms, preferably carried out in the presence of a catalyst selected from the group consisting of (i) one or more metal halides, (ii) one or more halogenated metal oxides, (iii) one or more zero-valent metals/metal alloys, (iv) a combination of two or more of the foregoing.

Aqueous emulsions of epoxy- and organo-substituted, branched organopolysiloxanes are prepared by emulsifying the latter in water with the aid of a dispersing agent. The emulsions are storage stable and are useful in multi-component coating, adhesive, and binder systems.

A method and circuit arrangement utilize a low latency variable transfer network between the register files of multiple processing cores in a multi-core processor chip to support fine grained parallelism of virtual threads across multiple hardware threads. The communication of a variable over the variable transfer network may be initiated by a move from a local register in a register file of a source processing core to a variable register that is allocated to a destination hardware thread in a destination processing core, so that the destination hardware thread can then move the variable from the variable register to a local register in the destination processing core.

A microprocessor having performs an architectural instruction that instructs it to perform an operation on first and second source operands to generate a result and to write the result to a destination register only if its architectural condition flags satisfy a condition specified in the architectural instruction. A hardware instruction translator translates the instruction into first and second microinstructions. To execute the first microinstruction, an execution pipeline performs the operation on the source operands to generate the result. To execute the second microinstruction, it writes the destination register with the result generated by the first microinstruction if the architectural condition flags satisfy the condition, and writes the destination register with the current value of the destination register if the architectural condition flags do not satisfy the condition.

In a multiprocessor system, in general, a processor assigned with a larger amount of tasks is apt to perform a larger amount of communication with other processors assigned with tasks, than a processor assigned with a smaller amount of tasks. Thus in order for each processor to be able to perform the routing process efficiently, tasks are assigned such that, when there are a first processor and a second processor, the number of processors each assigned with one or more tasks and directly connected with the second processor being smaller than the number of processors each assigned with one or more tasks and directly connected with the first processor, the amount of tasks assigned to the first processor is equal to or larger than the amount of tasks assigned to the second processor.

A system and method is disclosed for communicating with sensors/loggers in integrated radio frequency identification (RFID) tags. An RFID reader uses a Communicate With Data Logger Command to communicate with a data logger in an RFID tag. The RFID reader performs data access processes using an Index Register and a Data Register of the RFID tag. The RFID reader selects one of (1) Index Read access (2) Index Write access (3) Data Write access (4) Data Read access with parity and (5) Data Read access with cyclic redundancy check (CRC). The RFID tag performs the requested data access and then performs an error detection process.

A data processing system arranged for receiving over a network, according to a data transfer protocol, data directed to any of a plurality of destination identities, the data processing system comprising: data storage for storing data received over the network; and a first processing arrangement for performing processing in accordance with the data transfer protocol on received data in the data storage, for making the received data available to respective destination identities; and a response former arranged for: receiving a message requesting a response indicating the availability of received data to each of a group of destination identities; and forming such a response; wherein the system is arranged to, in dependence on receiving the said message.

The disclosure generally describes computer-implemented methods, software, and systems for creating and using two-tier mobile applications. A computer-implemented method includes identifying at least a portion of a database to be associated with a mobile application, retrieving a set of metadata associated with the at least a portion of the identified database, automatically generating a set of mobile application source code for directly accessing the at least a portion of the database based on the set of retrieved metadata, and compiling the set of mobile application source code into a distributable mobile application, the distributable mobile application configured to directly access the identified database associated with the mobile application. In some instances, the identifying, retrieving, generating, and compiling operations are performed at design time, while at runtime, the mobile application is executable by a mobile device and, during runtime execution, can request database-related information directly from the identified database.

An aspect of the present invention identifies differences between source codes (e.g. of different versions of a software), when each source code is organized using incorporated files. In one embodiment, in response to receiving identifiers of a first and second source codes (each source code being organized as a corresponding set of code files), listings of the instructions in the first and second source codes are constructed. Each listing is constructed, for example, by replacing each incorporate statement in the source code with instructions stored in a corresponding one of code files. The differences between the first and second source codes are then found by comparing the constructed listings of instructions.

In one embodiment of the invention, a method is disclosed for modifying a pre-existing application program for multi-processing and/or distributed parallel processing. The method includes searching an application program for a computational loop; analyzing the computational loop to determine independence of the computational transactions of the computational loop; and replacing the computational loop with master code and slave code to provide master-slave execution of the computational loop in response to analyzing the computational loop to determine independence of the computational transactions of the computational loop. Multiple instances of the modified application program are executed to provide multi-processing and/or distributed parallel processing.

A binary library overload instruction is received at an embedded computing device that executes a write-protected firmware build. The binary library overload instruction specifies a write-protected binary library of the write-protected firmware build to be overloaded by execution of an alternative binary library instead of the write-protected binary library of the write-protected firmware build. The alternative binary library is configured within a random access memory (RAM) storage area to execute instead of the write-protected binary library as specified in the received binary library overload instruction. The write-protected firmware build is executed using the alternative binary library instead of the write-protected binary library specified in the binary library overload instruction.

A method of automating the deployment of a number of enterprise applications on one or more computer data processing systems. Each enterprise application or update is stored in a dynamic distribution directory and is provided with identifying indicia, such as stage information, target information, and settings information. When automated enterprise deployment is invoked, computer instructions in a computer readable medium provide for initializing deployment, performing deployment, and finalizing deployment of the enterprise applications or updates.

The present invention primarily concerns certain 4-alkyl pyridines of the following formula (I), wherein R is C8-C12 alkyl, odiferous substance mixtures and aromatic substance mixtures containing these 4-alkyl pyridines, the respective uses thereof as an odiferous or aromatic substance (mixture) and corresponding perfumed products.

1-(3/4-isobutyl-1/6-methylcyclohex-3-enyl)methanols and derivatives thereof having appreciable floral and hesperidic odor notes, their use as fragrance ingredient and perfumed products comprising them.

A para-methoxy protected benzaldehyde useful in preparation of treprostinil, and of formula: (Formula (1)) is prepared by subjecting to Claisen re-arrangement a substituted benzaldehyde of formula (1a): (Formula (Ia)) to form the m-hydroxy-substituted benzaldehyde of formula (1b): (Formula (Ib)) and then reacting compound (1b) with a p-methoxybenzyl (PMB) compound to form a PMB-substituted benzaldehyde of formula (1).

Navigation systems and associated methods for providing navigation services are provided. Information associated with a desired route for a vehicle, such as a route between a current location and a desired destination, may be determined. Additionally, contextual information associated with the vehicle may be identified. Based upon the desired route and the contextual information, a direction may be generated for presentation to one or more users, and the generated direction may be output for presentation.

Traffic information readings corresponding to a vehicle are received, the readings including at least a location. The traffic information readings are compared to information already within a map database, and are used to derive additional map information augmenting or correcting that already within the database, the additional map information subsequently being stored in the database. Additional information that is derived includes the presence of stop signs and traffic lights at intersections, the legality of turns at certain times of day, and the connectedness or non-connectedness of road segments.

Various methods, apparatuses and/or articles of manufacture are provided which may be implemented to estimate a trajectory of a mobile device within an indoor environment. In some embodiments, the trajectory may be estimated without the use of any signal-based positioning information. For example, a mobile device may estimate such a trajectory based, at least in part, on one or more sensor measurements obtained at the mobile device, and further affect the estimated trajectory based, at least in part, on one or more objects identified in an electronic map of the indoor environment.

Vehicle event recorder systems are arranged to be in constant communication with remote servers and administrators via mobile wireless cellular networks. Vehicle event recorders equipped with video cameras capture video and other data records of important events relating to vehicle use. These data are then transmitted over special communications networks having very high coverage space but limited bandwidth. A vehicle may be operated over very large region while maintaining continuous communications connections with a remote fixed server. As such, systems of these inventions may be characterized as including a mobile unit having: a video camera; a microprocessor; memory; an event trigger; and mobile wireless transceivers, and a fixed network portion including: mobile wireless cellular network, a protocol translation gateway, the Internet and an application-specific server.

A system, method, and computer program product for automatically generating equivalent assertions in different forms for different verification tools, which may be analog or digital. A user submits a set of logic assertions that, if unclocked, are converted to clocked assertions by generating and skewing clocks to ensure simulator uniformity. A stimulus is generated, perhaps at random, or input. A test bench is either input or synthesized. For each verification tool, the test bench is simulated and simulation results are captured. An assertion status difference engine evaluates result differences between the verification tools, and identifies and outputs differences indicating a significant inconsistency. Errors in verification tool implementation and user assertion coding can be detected. The simulators used may include SPICE and Verilog, or any other simulators that differ in type, simulation algorithm, input format, or vendor implementation.

A method includes providing a design of a semiconductor device such as a stacked CMOS device comprising a plurality of circuit elements to be assigned into a layout of a plurality of tiers, and identifying at least one first type of circuit element within the plurality of circuit elements based on at least one predetermined criterion. Each respective one of the at least one first type of circuit element is to be assigned to a respective designated one of the plurality of tiers. The method further includes dividing the remainder of the plurality of circuit elements into at least two groups of circuit elements based on circuit density, and assigning the at least one first type of circuit element and the at least two groups of circuit elements to respectively different ones of the plurality of tiers of the semiconductor device.

A method for designing a transformer in an integrated circuit includes receiving one or more desired characteristics of the transformer from user input and iteratively determining a design solution for the transformer through one or more simulations and modifications using a rule-set. The method combines the one or more desired characteristics with other preset characteristics of the transformer or the integrated circuit. A first model of the transformer is defined with typical load impedances and simulated having the combined characteristics to determine performance. Results of the simulation are processed to calculate performance with the load impedances specified by the user. The results are further processed to obtain a mathematical model that includes tuning capacitors. The first and subsequent models are modified by drawing on a rule-set of expert knowledge relating to general dependency of at least one design criterion, such as a physical, geometrical or performance characteristic, with another design criterion.

Aspects of the invention relate to techniques of generating guiding patterns for via-type feature groups. A guiding pattern may be constructed for a via-type feature group that comprises two or more via-type features in a layout design. A backbone structure may then be determined for the guiding pattern. Based on the backbone structure and a self-assembly model, simulated locations of the two or more via-type features are computed. The simulated locations are compared with targeted locations. If the simulated locations do not match the targeted locations based on a predetermined criterion, the simulated locations adjusted to derive modified locations. Using the modified locations, the above operations may be repeated until the simulated locations match the targeted location based on a predetermined criterion or for a predetermined number of times.

An integrated circuit includes core logic and a plurality of interface blocks disposed about a periphery of the core logic. A plurality of input or output (I/O) circuits is assigned to one of the plurality of interface blocks. The I/O circuits include external I/O circuits coupled to a device other than the integrated circuit and internal I/O circuits coupled to the integrated circuit. Each interface block includes a first plurality of I/O circuits disposed on a first side of the interface block and a second plurality of I/O circuits disposed on a second side of the interface block. Each interface block also includes interface logic for the interface block between the first plurality of I/O circuits and the second plurality of I/O circuits, and a logic hub that includes a clock distribution of minimal length that drives launch logic and capture logic to form the I/O circuits of the interface block.

A method of creating a datasheet includes obtaining integrated circuit data from at least one data source, creating a data structure including the integrated circuit data obtained from the at least one data source, and creating a datasheet using data contained in the data structure. The datasheet is created in a human-readable format.

A technique for determining whether an integrated circuit design is susceptible to glitches includes identifying storage elements in an original register-transfer level (RTL) file of the integrated circuit design and identifying clock signals for each of the storage elements in the original RTL file. The technique also includes generating respective assertions for each of the identified clock signals and identifying potential glitchy logic in respective clock paths for each of the identified clock signals. Finally, the technique includes inserting, at the potential glitchy logic, glitches in each of the respective clock paths of the original RTL file to provide a modified RTL file and executing an RTL simulation using the modified RTL file and the respective assertions.

Routing methods for an integrated circuit design layout are disclosed. The layout can include design netlists and library cells. A multiple-level global routing can generate topological wire for each net. An area oriented graph-based detail routing on the design can be performed. A post route optimization after the detail routing can be performed to further improve the routing quality. Some methods can be single threaded all or some of the time, and/or multi-threaded some or all of the time.

The disclosed technology is related to adjusting an integrated circuit design while accounting for a local density of the design. In particular exemplary embodiments, a local density value for a layout design that defines a plurality of geometric shapes is derived. Subsequently, one or more of the geometric shapes are adjusted such that the local density value is preserved. With some implementations, the local density value is preserved if the adjusted local density value is within a threshold amount of the derived local density value.

An elongated segmented soap bar is segmented longitudinally into a plurality of soap bodies separate and discrete from one another. Adjacent soap bodies are movable with respect to one another between at least two different configurations including at least an arc configuration with the plurality of soap bodies disposed in an arc. At least one coupler couples the plurality of soap bodies together to allow the adjacent soap bodies to move with respect to one another between the at least two different configurations.

This invention relates to extend the benefits of using hypochlorite compounds such as sodium hypochlorite to clean and disinfect articles while reducing or eliminating the side effects of treating an article with a strong oxidant material. The invention relates to a single step process involving mixing of precursor compositions of a suitable hypohalite or hypohalous acid with a solution of a reducing agent. Optionally a buffer may be present in either or both precursor compositions, such that at time of use such active hypohalous acid concentration in the resulting aqueous mixture remains at a sufficient activity level to effect one or more desired benefits against a target substrate for a desired period of time. The oxidant is substantially consumed by reaction with the reducing agent after the time needed for achieving the desired benefit has passed.

A granulated foam control composition comprises a foam control agent based on a polydiorganosiloxane fluid, an organic additive of melting point 45″17C to 100° C. comprising a polyol ester, a water-soluble particulate inorganic carrier and a polymer having a net cationic charge. The mean number of carbon atoms in the organo groups of the polydiorganosiloxane fluid is at least 1.3. The foam control agent includes a hydrophobic filler dispersed in the polydiorganosiloxane fluid, and optionally an organosilicone resin. The polyol ester is miscible with the polydiorganosiloxane fluid.

The invention relates to compositions, methods of use, and methods of manufacture for an intercalated bleach compound and compositions thereof. The intercalated bleach compound has the formula Mx(OCl)y(O)m(OH)n where M is an alkaline earth metal such as magnesium, calcium or mixture thereof. The values of x and y independently equal any number greater than or equal to 1 (e.g., 1, 2, 3, 4, etc.), and m and n independently equal any number greater than or equal to 0 (e.g., 0, 1, 2, 3, 4, etc.), but m and n are not both 0. In addition, the molar ratio of the alkaline earth metal (e.g., magnesium or calcium) to hypochlorite is at least 3:1. In other words, x is ≧3y. The compounds exhibit excellent stability, little or no chlorine bleach odor, exhibit excellent pH buffering characteristics, and less reactivity with organic materials as compared to alternative chlorine bleach products.

A superconducting structure (1) has a plurality of coated conductor tapes (2; 2a-2o), each with a substrate (3) which is one-sided coated with a superconducting film (4), in particular an YBCO film, wherein the superconducting structure (1) provides a superconducting current path along an extension direction (z) of the superconducting structure (1), wherein the coated conductor tapes (2; 2a-2o) provide electrically parallel partial superconducting current paths in the extension direction (z) of the superconducting structure (1), is characterized in that the coated conductor tapes (2; 2a-2o) are superconductively connected among themselves along the extension direction (z) continuously or intermittently. A more stable superconducting structure with which high electric current strengths may be transported is thereby provided.

According to one embodiment, an oxide superconductor includes an oriented superconductor layer and an oxide layer. The oriented superconductor layer contains fluorine at 2.0×1016-5.0×1019 atoms/cc and carbon at 1.0×1018-5.0×1020 atoms/cc. The superconductor layer contains in 90% or more a portion oriented along c-axis with an in-plane orientation degree (Δφ) of 10 degrees or less, and contains a LnBa2Cu3O7-x superconductor material (Ln being yttrium or a lanthanoid except cerium, praseodymium, promethium, and lutetium). The oxide layer is provided in contact with a lower surface of the superconductor layer and oriented with an in-plane orientation degree (Δφ) of 10 degrees or less with respect to one crystal axis of the superconductor layer. Area of a portion of the lower surface of the superconductor layer in contact with the oxide layer is 0.3 or less of area of a region directly below the superconductor layer.

An apparatus includes a plurality of applications and an integrator having a voice recognition module configured to identify at least one voice command from a user. The integrator is configured to integrate information from a remote source into at least one of the plurality of applications based on the identified voice command. A method includes analyzing speech from a first user of a first mobile device having a plurality of applications, identifying a voice command based on the analyzed speech using a voice recognition module, and incorporating information from the remote source into at least one of a plurality of applications based on the identified voice command.

In a mobile device, a bone conduction or vibration sensor is used to detect the user's speech and the resulting output is used as the source for a low power Voice Trigger (VT) circuit that can activate the Automatic Speech Recognition (ASR) of the host device. This invention is applicable to mobile devices such as wearable computers with head mounted displays, mobile phones and wireless headsets and headphones which use speech recognition for the entering of input commands and control. The speech sensor can be a bone conduction microphone used to detect sound vibrations in the skull, or a vibration sensor, used to detect sound pressure vibrations from the user's speech. This VT circuit can be independent of any audio components of the host device and can therefore be designed to consume ultra-low power. Hence, this VT circuit can be active when the host device is in a sleeping state and can be used to wake the host device on detection of speech from the user. This VT circuit will be resistant to outside noise and react solely to the user's voice.

An information processing apparatus configured to display a user interface on a display unit according to screen information acquired from an outside device changes the screen information according to a display attribute set by a user, and if setting of a display attribute of an object included in the screen information is unchangeable, color conversion processing of a specified object included in the screen information is performed and the screen information obtained by executing conversion processing according to the display attribute set by the user with respect to the screen information including the object which has undergone the color conversion processing is displayed.

A computer-implemented method of detecting automated identities, including. The method includes, using one or more computing devices, providing for display to a user a first representation of a first profile for a first identity and a second representation of a second profile for a second identity, providing for display to the user a choice indication mechanism for indicating a judgment about the first representation of the first profile for the first identity and the second representation of the second profile for the second identity, receiving an indication of the judgment from the user about the first representation of the first profile for the first identity and the second representation of the second profile for the second identity, and determining whether at least one of the first identity, the second identity, or the user is more or less likely to be automated, based at least in part on the received indication.

Architectures and techniques are provided to control the rendering of supplemental content associated with electronic books. For example, electronic books may be associated with content that is in addition to the content originally provided to an individual acquiring the electronic book, such as annotations, social networking site information, media outlet information, and the like. Individuals may control the supplemental electronic book content that is rendered via their client devices via actuation of a physical input device or a representation of an input device shown via a touch sensitive display. The amount of supplemental content that is rendered may correspond to information associated with a specified number of categories of supplemental electronic book content based on a supplemental content rendering level. In other implementations, the amount of supplemental electronic book content that is rendered may correspond to an amount of supplemental content to be rendered for each category of supplemental content.

Images are analyzed within a 3D environment that is generated based on spatial relationships of the images and that allows users to experience the images in the 3D environment. Image analysis may include ranking images based on user viewing information, such as the number of users who have viewed an image and how long an image was viewed. Image analysis may further include analyzing the spatial density of images within a 3D environment to determine points of user interest.

A method for producing a silica-supported catalyst comprising Mo, V. Nb, and a component X (Sb and/or Te) to be used in a vapor phase catalytic oxidation or ammoxidation of proprane, comprising the steps of: (I) preparing a raw material mixture solution by mixing Mo, V, Nb, component X, a silica sol, and water;(II) obtaining a dry powder by drying the raw material mixture solution; and(III) obtaining a silica-supported catalyst by calcining the dry powder, wherein the silica sol contains 10 to 270 wt ppm of nitrate ions based on SiO2.

Substituted phenylcarbamoyl alkylamino arenes; substituted phenylthiocarbamyl alkylamino arenes; substituted phenylcarbamoyl alkylamino heteroarenes; substituted phenylthiocarbamyl alkylamino heteroarenes; N-substituted aryl, N'-substituted aryl urea compounds; N-substituted aryl, N'-substituted heteroaryl urea compounds; N-substituted aryl, N'-substituted aryl thiourea compounds and N-substituted aryl, N'-substituted heteroaryl thiourea compounds are provided and may find use as androgen receptor modulators. The compounds may find particular use in treating prostate cancer, including castration-resistant prostate cancer and/or hormone-sensitive prostate cancer.

Alkyl nitrate ester compounds are provided for the delivery of nitric oxide to targeted muscle tissues, and in particular, to normal and dystrophic muscles. In one aspect, nitrate ester compounds are provided having the following formula: wherein, R1 is ONO2, CH2ONO2, CnH2n+1OH, CnH2n+1OH, or CH2CH2CH3, or H;R2 is ONO2, CH2ONO2, Cn'H2n'+1OH, Cn'H2n'+1OH, CH2CH2CH3 or H; andR3 is ONO2, CH2ONO2, Cn'″H2n″+1OH, Cn″H2n″+1OH, CH2CH2CH3 or H; wherein n is an integer from 0 to 9, n' is an integer from 0 to 9, and n″ is an integer from 0 to 9, and n+n'+n″≦9, and wherein at least one of R1, R2, and R3 is an ester nitrate selected from the group consisting of ONO2, CH2ONO2, and combinations thereof.