The invention relates to a hardenable dental composition comprising component (A) comprising a cationically hardenable compound, component (B) comprising an initiator being able to initiate the hardening reaction of the cationically hardenable compound, and component (C) comprising a filler, wherein the filler comprises a filler body and a filler surface, the filler surface comprising side groups with polar moieties. The invention also relates to a process of producing the dental composition, to the use of the dental composition as dental impression material and to a method of taking an impression of dental tissue.

An environmentally beneficial process for utilizing waste drill cuttings from oil and gas exploration. The waste drill cuttings (20) are used as a filler and combined with plastic to provide a plastic based product (26) in the plastics industry. In an embodiment the cuttings are thermally treated and formed into pellets. In a further embodiment the cuttings are treated and mixed with recycled plastic to be formed into pellets. The pellets are then used in the manufacture of rigid plastic products such as bollards, planters, benches and decking.

The present invention provides an efficient and low cost method for processing radioactively-contaminated water. The method for processing radioactively-contaminated water comprising a freeze concentration step of generating ice having lowered concentration of radioactive substance from radioactive substance containing contaminated water and concentrating the radioactive substances in the residual contaminated water by the interface progressive freeze concentration process. Preferably, the method further comprises a nitrogen substitution step of reducing dissolved oxygen in the contaminated water and adding nitrogen gas to the contaminated water, as a previous step of the freeze concentration step. Preferably, the radioactive substance is radioactive cesium.

A continuous process for the thermal treatment of a refinery sludge, comprising the following operations: a. drying of the refinery sludge, possibly mixed with pet-coke, at a temperature ranging from 110 to 120° C.; b. gasification of the dried sludge, at a temperature ranging from 750 to 950° C., for a time of 30 to 60 minutes, in the presence of a gas containing oxygen and water vapour, with the associated production of synthesis gas (CO+H2) and a solid residue; c. combustion of the synthesis gas at a temperature ranging from 850 to 1,200° C. and recycling of the combustion products for the drying and gasification phases; and d. inertization of the solid residue, at a temperature ranging from 1,300 to 1,500° C., by vitrification with plasma torches.

Techniques for disposing of one or more toxic materials, such as coal waste (e.g., fly ash, sludge, etc.), include incorporating the toxic materials into artificial feldspar or forming artificial feldspar from the toxic material(s). The artificial feldspar may be used to form an artificial aggregate, which may be used in a construction material, as road base, as a fill material or for any other suitable purpose. Artificial aggregates that are formed from toxic materials are also disclosed, as are construction materials that include such artificial aggregates.

A process for encapsulating a radioactive object to render the object suitable for shipment and/or storage, and including the steps of preparing a plastic material, causing the plastic material to react with a foaming agent, generating a foaming plastic, encapsulating the radioactive object in the foaming plastic, and allowing the foaming plastic to solidify around the radioactive object to form an impervious coating.

A treatment process of persistent organic pollutants contained in particles is provided. Said process includes reacting persistent organic pollutant in particles under hydrothermal conditions in the presence of Fe2+ and Fe3+. Several beneficial effects can be achieved, including 1) no other additive is needed during the reaction process; 2) Fe2+ and Fe3+ are safe, cheap and extensive sources; 3) because Fe2+ and Fe3+ are dissolved, they can fully disperse into particles, and fully contact can be achieved, thus obtaining a decomposition rate no less than 70% of the persistent organic pollutants is under subcritical conditions.

The cost relating to a reduction in volume and storage of a waste resin including a radioactive nuclide is reduced. In an aspect of the invention, a volume reduction processing system 1000 is provided. The volume reduction processing system 1000 includes a radioactivity meter 102 that measures the radioactivity of a processing target resin, a volume reduction processing device 110 that carries out a heating process, and an oxidation process using oxygen plasma P on the processing target resin, and a process stopping point computation unit 180 that determines a process stopping point for carrying out a volume reduction process on the processing target resin with the volume reduction processing device as far as a volume reduction target value. The volume reduction processing device 110 stops at least one process of the heating process and oxidation process on the process stopping point being reached.

Disclosed is a processor that is able to efficiently execute DFT operations without having part of a basic operational circuit idle even during non-DFT-operation processing. The processor (1) has an operational means (operation unit) (2) and a control means (control unit) (3). The operation means (2) has a plurality of shift addition-and-subtraction means connected such that CORDIC (COordinate Rotation DIgital Computer) operations can be executed. The shift adding-and-subtracting means also execute shift addition-and-subtraction processing of butterfly operations that process shift addition-and-subtraction for one stage or more. The control means (3) instructs the operation means (2) to execute either CORDIC operations or butterfly operations, based on a plurality of data received from the outside.

Memory system operations are extended for a data processor by DMA, cache, or memory controller to include a DMA descriptor, including a set of operations and parameters for the operations, which provides for data compression and decompression during or in conjunction with processes for moving data between memory elements of the memory system. The set of operations can be configured to use the parameters and perform the operations of the DMA, cache, or memory controller. The DMA, cache, or memory controller can support moves between memory having a first access latency, such as memory integrated on the same chip as a processor core, and memory having a second access latency that is longer than the first access latency, such as memory on a different integrated circuit than the processor core.

A random number generation method and apparatus using a low-power microprocessor is provided. In the random number generation method, a low-power microprocessor determines whether external power is supplied to a random number generator. The low-power microprocessor updates an internal state of the random number generator based on a first scheme if it is determined that the external power is supplied to the random number generator. The low-power microprocessor updates the internal state of the random number generator based on a second scheme different from the first scheme if it is determined that the external power is not supplied to the random number generator.

Apparatus and method for processing linear systems of equations and finding a n×1 vector x satisfying Ax=b where A is a symmetric, positive-definite n×n matrix corresponding to n×n predefined high-precision elements and b is an n1 vector corresponding to n predefined high-precision elements. A first iterative process generates n low-precision elements corresponding to an n×1 vector xl satisfying Alxl=bl where Al, bl are elements in low precision. The elements are converted to high-precision data elements to obtain a current solution vector x. A second iterative process generates n low-precision data elements corresponding to an n×1 correction vector dependent on the difference between the vector b and the vector product Ax. Then there is produced from the n low-precision data elements of the correction vector respective high-precision data elements of an n×1 update vector u. The data elements of the current solution vector x are updated such that x=x+u.

Distributed processing system and method for discrete logarithm calculation. The speed and resource efficiency of discrete logarithm calculation may be improved by allowing a plurality of operation agents to distributively process an operation of generating a modulo multiplication auxiliary table, an operation of generating a pre-calculation table, and an operation of searching for an answer by applying an iterated function for discrete logarithm calculation in a discrete logarithm calculation operation using the pre-calculation table.

Techniques for medium access control. Some techniques include receiving, at a first computing device, a solicitation for at least a first medium access request that specifies at least one time period for transmitting the first medium access request to the second computing device; encoding the first medium access request at least in part by using a compressive sensing encoding technique to obtain a first encoded medium access request; and transmitting the first encoded medium access request to the second computing device during the at least one time period specified in the received solicitation.

The disclosure is related systems and methods for using operation durations of a data storage medium to generate random numbers. In one embodiment, a device may comprise a random number generator circuit configured to store a value representing a duration of an operation on the data storage medium, and generate a random number based on the value. Another embodiment may be a method comprising recording durations of access operations to a data storage medium, and generating a random number based on the durations.

A method of generating a code sequence in a wireless communication system is disclosed. More specifically, the method includes recognizing a desired length of the code sequence, generating a code sequence having a length different from the desired length, and modifying the length of the generated code sequence to equal the desired length. Here, the step of modifying includes discarding at least one element of the generated code sequence or inserting at least one null element to the generated code sequence.

The invention relates to a radiation curable composition for taking a dental impression comprising (A) a cationically hardenable compound comprising at least one aziridine moiety, and (B) a radiation sensitive starter, the radiation sensitive starter comprising an onium salt, a ferrocenium salt, a combination or mixture thereof.

A process for the preparation of polymer lattices comprising polymer nanoparticles by a photo-initiated heterophase polymerization includes preparing a heterophase medium comprising a dispersed phase and a continuous phase and at least one of at least one surfactant, at least one photoinitiator, and at least one polymerizable monomer. The at least one polymerizable monomer is polymerized by irradiating the heterophase medium with electromagnetic radiation so as to induce a generation of radicals. The at least one photoinitiator is selected from compounds comprising at least one phosphorous oxide group (P═O) or at least one phosphorous sulfide (P═S) group. The irradiating of the heterophase medium is effected so that a ratio of an irradiated surface of the heterophase medium to a volume of the heterophase medium is at least 200 m−1.

A process for the preparation of modified polymers by a photo-initiated polymerization includes preparing a polymerization medium comprising at least one photoinitiator comprising at least one phosphorous oxide (P═O) group or at least one phosphorous sulfide (P═S) group, and at least one polymerizable monomer. The at least one polymerizable monomer is polymerized by irradiating the polymerization medium with electromagnetic radiation so as to induce a generation of radicals so as to obtain a polymer. The polymer is modified by irradiating the polymer with electromagnetic radiation so as to induce a generation of radicals from the polymer in a presence of at least one modifying agent.

The present invention provides a process for producing electret fine particles or coarse powder that can be uniformly electrified and exhibits excellent electrophoretic properties. Specifically, the present invention relates to the production processes (1) and (2) below:(1) A process for producing electret fine particles, comprising emulsifying a fluorine-containing material that contains a vinylidene fluoride-hexafluoropropylene-tetrafluoroethylene terpolymer in a liquid that is incompatible with the fluorine-containing material to obtain emulsified particles; and subjecting the emulsified particles to electron ray irradiation, radial ray irradiation, or corona discharge treatment.(2) A process for producing electret coarse powder, comprising subjecting a resin sheet containing a vinylidene fluoride-hexafluoropropylene-tetrafluoroethylene terpolymer to electron ray irradiation, radial ray irradiation, or corona discharge treatment to process the resin sheet into an electret resin sheet; and pulverizing the electret resin sheet.

The present disclosure provides a method of providing an adhesive composition comprising the steps of combining crosslinkable composition including: a) a (meth)acryloyl monomer mixture with the b) photocrosslinking agent mixture, and irradiating with UVC radiation to polymerize and crosslink the composition.

A method includes configuring a processing circuit to perform: receiving a control word for an I/O operation, forwarding a transport command control block (TCCB) from the channel subsystem to a control unit, gathering data associated with the I/O operation, and transmitting the gathered data to the control unit in the I/O processing system. Gathering the data includes accessing entries of a list of storage addresses that collectively specifying the data. Based on an entry of the list comprising a not-set first flag and a corresponding first storage address, gathering data from a corresponding storage location, and based on an entry of the list comprising a set first flag and a corresponding second storage address, obtaining a next entry of the list from a second storage location.

In one exemplary embodiment, a computer-implemented method includes receiving, at a remote direct memory access (RDMA) device, a plurality of RDMA requests referencing a plurality of virtual pages. Data transfers are scheduled for the plurality of virtual pages, wherein the scheduling occurs at the RDMA device. The number of the virtual pages that are currently pinned is limited for the RDMA requests based on a predetermined pinned page limit.

A dispersed storage network memory includes a pool of storage nodes, where the pool of storage nodes stores a multitude of encoded data files. A storage node obtains and analyzes data access response performance data for each of the storage nodes to produce a modified data access response plan that includes identity of an undesired performing storage node and an alternative data access response for the undesired performing storage node. The storage nodes receive corresponding portions of a data access request for at least a portion of one of the multitude of encoded data files. The undesired performing storage node or another storage node processes one of the corresponding portions of the data access request in accordance with the alternative data access response.

A method of interacting with data at a wireless communication device is provided. The wireless communication device has access to a first set of capabilities. Data is received at the wireless communication device via a wireless transmission. The data represents visual content that is viewable via a display device. A graphical user interface, including a delayed action selector, is provided via the display device. An input is received within a limited period of time after displaying the delayed action selector. The input is associated with a command to delay execution of an action with respect to the data until the wireless communication device has access to a second set of capabilities. The action is not supported by the first set of capabilities but is supported by the second set of capabilities. An indication of receipt of the input is provided at the wireless communication device.

Aspects of the invention relate generally to validating array bounds in an API emulator. More specifically, an OpenGL (or OpenGL ES) emulator may examine each array accessed by a 3D graphic program. If the program requests information outside of an array, the emulator may return an error when the graphic is drawn. However, when the user (here, a programmer) queries the value of the array, the correct value (or the value provided by the programmer) may be returned. In another example, the emulator may examine index buffers which contain the indices of the elements on the other arrays to access. If the program requests a value which is not within the range, the emulator may return an error when the graphic is drawn. Again, when the programmer queries the value of the array, the correct value (or the value provided by the programmer) may be returned.

Method and system for an adapter is provided. The adapter includes a plurality of function hierarchies, with each function hierarchy including a plurality of functions and each function being associated with an event. The adapter also includes a plurality of processors for processing one or more events generated by the plurality of functions. The adapter further includes a first set of arbitration modules, where each arbitration module is associated with a function hierarchy and receives interrupt signals from the functions within the associated function hierarchy and selects one of the interrupt signals. The adapter also includes a second set of arbitration modules, where each arbitration module receives processor specific interrupt signals and selects one of the interrupt signals for processing an event associated with the selected interrupt signal.

In an interrupt control method of a multicore processor system including cores, a cache coherency mechanism, and a device, a first core detecting an interrupt signal from the device writes into an area prescribing an interrupt flag in the cache memory of the first core, first data indicating detection of the interrupt signal, and notifies the other cores of an execution request for interrupt processing corresponding to the interrupt signal, consequent to the cache coherency mechanism establishing coherency among at least cache memories of the other cores when the first data is written; and a second core different from the first core, maintaining the first data written as the interrupt flag, and notified of the execution request executes the interrupt processing, and writes over the area prescribing the interrupt flag written in the cache memory of the second core, with second data indicating no-detection of the interrupt signal.

A data processing apparatus has a plurality of processors and a plurality of interrupt interfaces each for handling interrupt requests from a corresponding processor. An interrupt distributor controls routing of interrupt requests to the interrupt interfaces. A shared interrupt request is serviceable by multiple processors. In response to the shared interrupt request, a target interrupt interface issues an interrupt ownership request to the interrupt distributor, without passing the shared interrupt request to the corresponding processor, if it estimates that the corresponding processor is available for servicing the shared interrupt request. The shared interrupt request is passed to the corresponding processor when an ownership confirmation is received from the interrupt distributor indicating that the processor has been selected for servicing the shared interrupt request.

An information processing apparatus includes a plurality of modules connected in a ring shape via a bus, and each module processes a packet flowing in a single direction on the ring in a predetermined order. The module includes a communication unit for transmitting a packet received from a first direction in the ring via the bus to a second direction, a discrimination unit for discriminating a packet from among the packets received from the first direction as a processing packet to be processed by the module, and a processing unit which is connected with the communication unit one by one and configured to process the processing packet. The communication unit transmits the packet processed by the processing unit at an interval equivalent to processing time or more for a processing packet processed by a module in a latter stage in the predetermined order among packets transmitted by the communication unit to the second direction.

Certain embodiments of the present disclosure are directed to a baseboard management controller (BMC) that includes a PCI express (PCIe) interface controller configured to provide access to a PCIe channel over a PCIe link, and firmware. The firmware includes a PCIe module being configured to access the PCIe channel through the PCIe interface controller and registered as a PCIe function. A software stack of the BMC communicates, through the PCIe module, with a PCIe device over the PCIe channel.

A bridge includes a Peripheral Component Interconnect Express interface supporting at least two lanes, an Extensible Host Controller Interface, and a Universal Serial Bus 3.0 root hub. The Peripheral Component Interconnect Express interface is used for coupling to a host. Each lane of the at least two lanes provides a highest data transmission speed. The Extensible Host Controller Interface is coupled to the Peripheral Component Interconnect Express interface for storing data transmitted by the Peripheral Component Interconnect Express interface. The Universal Serial Bus 3.0 root hub includes a first controller and a second controller. The first controller and the second controller are used for controlling data transmission of four ports, and a highest data transmission speed provided by each port of the four ports is not more than the highest data transmission speed provided by the lane.

A system, method and computer-readable media for managing a compute environment are disclosed. The method includes importing identity information from an identity manager into a module performs workload management and scheduling for a compute environment and, unless a conflict exists, modifying the behavior of the workload management and scheduling module to incorporate the imported identity information such that access to and use of the compute environment occurs according to the imported identity information. The compute environment may be a cluster or a grid wherein multiple compute environments communicate with multiple identity managers.

A method for efficient dispatch/completion of a work element within a multi-node data processing system. The method comprises: selecting specific processing units from among the processing nodes to complete execution of a work element that has multiple individual work items that may be independently executed by different ones of the processing units; generating an allocated processor unit (APU) bit mask that identifies at least one of the processing units that has been selected; placing the work element in a first entry of a global command queue (GCQ); associating the APU mask with the work element in the GCQ; and responsive to receipt at the GCQ of work requests from each of the multiple processing nodes or the processing units, enabling only the selected specific ones of the processing nodes or the processing units to be able to retrieve work from the work element in the GCQ.

A system and method for detecting, filtering, prioritizing and reporting shared memory hazards are disclosed. The method includes, for a unit of hardware operating on a block of threads, mapping a plurality of shared memory locations assigned to the unit to a tracking table. The tracking table comprises initialization information for each shared memory location. The method also includes, for an instruction of a program within a barrier region, identifying a potential conflict by identifying a second access to a location in shared memory within a block of threads executed by the hardware unit. First information associated with a first access and second information associated with the second access to the location is determined. Filter criteria is applied to the first and second information to determine whether the instruction causes a reportable hazard. The instruction is reported when it causes the reportable hazard.

Systems, methods and computer program products may provide managing utilization of one or more physical processors in a shared processor pool. A method of managing utilization of one or more physical processors in a shared processor pool may include determining a current amount of utilization of the one or more physical processors and generating an instruction message. The instruction message may be at least partially determined by the current amount of utilization. The method may further include sending the instruction message to a guest operating system, the guest operating system having a number of enabled virtual processors.

Techniques for adaptive thread scheduling on a plurality of cores for reducing system energy are described. In one embodiment, a thread scheduler receives leakage current information associated with the plurality of cores. The leakage current information is employed to schedule a thread on one of the plurality of cores to reduce system energy usage. On chip calibration of the sensors is also described.

The technology of the present application provides a networked computer system with at least one workstation and at least one shared resource such as a database. Access to the database by the workstation is managed by a database management system. An access engine reviews job requests for access to the database and allows job requests access to the resource based protocols stored by the system.

Disclosed are a reconfigurable processor and processing method, a reconfiguration control apparatus and method, and a thread modeler and modeling method. A memory area of a reconfigurable processor may be divided into a plurality of areas, and a context enabling a thread process may be stored in respective divided areas, in advance. Accordingly, when a context switching is performed from one thread to another thread, the other thread may be executed by using information stored in an area corresponding to the other thread.

Disclosed is an information processing device and a task switching method that can reduce the time required for switching of tasks in a plurality of coprocessors. The information processing device (30) includes a processor core (301); coprocessors (311 to 31n) including operation units (321 to 32n) that perform operation in response to a request from the processor core (301) and operation storage units (331 to 22n) that store the contents of operation of the operation units (321 to 32n), save storage units (351 to 35n) that store the saved contents of operation, a task switching control unit (302) that outputs a save/restore request signal when switching a task on which operation is performed by the coprocessors (311 to 31n), and save/restore units (341 to 34n) that perform at least one of saving of the contents of operation in the operation storage units (331 to 33n) to the save storage units (351 to 35n) and restoration of the contents of operation in the save storage units (351 to 35 n) to the operation storage units (331 to 33n) in response to the save/restore request signal.

A process for producing a fluoroalkyl iodide as a telomer Rf(CF2CF2)nI (wherein Rf is a C1-10 fluoroalkyl group, and n is an integer of from 1 to 6) by telomerization from a fluoroalkyl iodide represented by the formula RfI (wherein Rf is as defined above) as a telogen and tetrafluoroethylene (CF2CF2) as a taxogen, which comprises a liquid phase telomerization step of supplying a homogeneous liquid mixture of the telogen and the taxogen from the lower portion of a tubular reactor, moving the mixture from the lower portion towards the upper portion of the reactor in the presence of a radical initiator over a retention time of at least 5 minutes while the reaction system is kept in a liquid phase state under conditions where no gas-liquid separation will take place, so that the taxogen supplied to the reactor is substantially consumed by the reaction in the reactor, and drawing the reaction product from the upper portion of the reactor.

Disclosed are: a diaryliodonium salt mixture which is a precursor of a BF4 salt or the like of a diaryliodonium compound, can be produced in the form of crystals at ambient temperature, can be purified in a simple manner, can be produced with high efficiency, and can be induced into a BF4 salt or the like salt that has excellent solubility in a monomer or the like; and a process for producing the diaryliodonium salt mixture. Also disclosed is a production process which can achieve good yield and can produce reduced amounts of byproducts, and is therefore applicable to the industrial mass production of a diaryliodonium compound. The diaryliodonium salt mixture is characterized by containing at least two specific diaryliodonium salts.

The instant invention relates to a process and method for manufacturing 2,3,3,3-tetrafluoropropene by dehydrohalogenating a reactant stream of 2-chloro-1,1,1,2-tetrafluoropropane that is substantially free from impurities, particularly halogenated propanes, propenes, and propynes.

Disclosed is a process for producing 1,2-dichloro-3,3,3-trifluoropropene, which is characterized by that 1-halogeno-3,3,3-trifluoropropene represented by the general formula [1]: (In the formula, X represents a fluorine atom, chlorine atom or bromine atom.) is reacted with chlorine in a gas phase in the presence of a catalyst. It is possible by this process to produce 1,2-dichloro-3,3,3-trifluoropropene in an industrial scale with good yield by using 1-halogeno-3,3,3-trifluoropropene, which is available with a low price, as the raw material.

The invention also relates a process for the manufacture of trans 1-chloro3,3,3-trifluoropropene. The process comprises an isomerization step from cis 1233zd to trans 1233zd.

The invention also relates a process for the manufacture of trans 1-chloro3,3,3-trifluoropropene. The process comprises an isomerization step from cis 1233zd to trans 1233zd.

The present disclosure relates to processes for reducing the concentration of RfC≡CX impurities in fluoroolefins. The process involves: contacting a mixture comprising at least one fluoroolefin and at least one RfC≡CX impurity with at least one amine to reduce the concentration of the at least one RfC≡CX impurity in the mixture; wherein Rf is a perfluorinated alkyl group, and X is H, F, Cl, Br or I. The present disclosure also relates to processes for making at least one hydrotetrafluoropropene product selected from the group consisting of CF3CF═CH2, CF3CH═CHF, and mixtures thereof and reducing the concentration of CF3C═CH impurity generated during the process. The present disclosure also relates to processes for making at least one hydrochlorotrifluoropropene product selected from the group consisting of CF3CCl═CH2, CF3CH═CHCl, and mixtures thereof and reducing the concentration of CF3C≡CH impurity generated during the process.

Disclosed is a process for the synthesis of 1,1,2,3-tetrachloropropene (HCC-1230xa) using 1,1,3-trichloropropene (HCC-1240za) and/or 3,3,3-trichloropropene (HCC-1240zf) and Cl2 gas as the reactants, wherein the process takes place in a single reactor system. Before this invention, HCC-1230xa was made in a two-step process using HCC-1240za/HCC-1240zf and Cl2 gas, and the processing was conducted using two separate reactors.

The present disclosure relates to a process for separating a fluoroolefin from a mixture comprising hydrogen fluoride and fluoroolefin, comprising azeotropic distillation both with and without an entrainer. In particular are disclosed processes for separating any of HFC-1225ye, HFC-1234ze, HFC-1234yf or HFC-1243zf from HF.

The present invention is directed to processes for the production of 1233zd from 240fa and HF, with or without a catalyst, at a commercial scale. The 240fa and HF are fed to a reactor operating at high pressure. The resulting product stream comprising 1233zd, HCl, HF, and other byproducts is treated to one or more purification techniques including phase separation and one or more distillations to provide purified 1233zd, which meets commercial product specifications, i.e., having a GC purity of 99.5% or greater.