Particular aspects provide compositions comprising an electrokinetically altered oxygenated aqueous fluid, wherein the oxygen in the fluid is present in an amount of at least 25 ppm. In certain aspects, the electrokinetically altered oxygenated aqueous fluid comprises electrokinetically modified or charged oxygen species present in an amount of at least 0.5 ppm. In certain aspects the electrokinetically altered oxygenated aqueous fluid comprises solvated electrons stabilized by molecular oxygen, and wherein the solvated electrons present in an amount of at least 0.01 ppm. In certain aspects, the fluid facilitates oxidation of pyrogallol to purpurogallin in the presence of horseradish peroxidase enzyme (HRP) in an amount above that afforded by a control pressure pot generated or fine-bubble generated aqueous fluid having an equivalent dissolved oxygen level, and wherein there is no hydrogen peroxide, or less than 0.1 ppm of hydrogen peroxide present in the electrokinetic oxygen-enriched aqueous fluid.

Emulsions, and processes for making the emulsions, useful for imparting water resistance to gypsum products are disclosed. Process for making the emulsion and gypsum products made from the emulsion are also disclosed. The emulsions of the invention include at least one paraffin wax and a hydrophilic metallic salt. The emulsions of the invention may further include a saponifiable wax substitute for montan wax. The emulsions of the invention may further include a biocide.

An object of the present invention is to provide a method for producing a conductive material that allows a low electric resistance to be generated, and that is obtained by using an inexpensive and stable conductive material composition containing no adhesive. The conductive material can be provided by a producing method that includes the step of sintering a first conductive material composition that contains silver particles having an average particle diameter (median diameter) of 0.1 μm to 15 μm, and a metal oxide, so as to obtain a conductive material. The conductive material can be provided also by a method that includes the step of sintering a second conductive material composition that contains silver particles having an average particle diameter (median diameter) of 0.1 μm to 15 μm in an atmosphere of oxygen or ozone, or ambient atmosphere, at a temperature in a range of 150° C. to 320° C., so as to obtain a conductive material.

A method of reducing the downward flow of air currents on the leeward side of an emissions emitting structure including the step of using a system that includes components chosen from the group consisting of one or more mechanical air moving devices; physical structures; and combinations thereof to create an increase in the air pressure within a volume of air on the leeward side of an emissions emitting structure having emissions that become airborne. The increased air pressure prevents or lessens downward flow of emissions that would occur without the use of the system and increases the safety by which one can travel a road or other transportation route that might otherwise be visually obscured by the emissions and the safety of the property and those within the area where emissions occur.

Antibacterial sol-gel coating solutions are used to form articles. The antibacterial sol-gel coating solution includes at least one Ti or Si-containing compound that is capable of hydrolyzing to form a base film; a regulating agent capable of regulating the hydrolysis rate of the Ti or Si-containing compounds, an organic solvent, water, and at least one soluble compound of an antibacterial metal, such as Ag, Cu, Mg, Zn, Sn, Fe, Co, Ni, or Ce.

Method for making a liquid foam from graphene. The method includes preparing an aqueous dispersion of graphene oxide and adding a water miscible compound to the aqueous dispersion to produce a mixture including a modified form of graphene oxide. A second immiscible fluid (a gas or a liquid) with or without a surfactant are added to the mixture and agitated to form a fluid/water composite wherein the modified form of graphene oxide aggregates at the interfaces between the fluid and water to form either a closed or open cell foam. The modified form of graphene oxide is the foaming agent.

Provided is an oil-in-water silicone emulsion composition that has a low silicone oligomer content, and that can form, even without the use of an organotin compound as a curing catalyst, a cured film that exhibits satisfactory strength and satisfactory adherence to a substrate, through the removal of water fraction. An oil-in-water silicone emulsion composition comprising (A) 100 mass parts of a polyorganosiloxane that contains in each molecule at least two groups selected from the group consisting of a silicon-bonded hydroxyl group, alkoxy group, and alkoxyalkoxy group, (B) 0.1 to 200 mass parts of a colloidal silica, (C) 0.1 to 100 mass parts of an aminoxy group-containing organosilicon compound that has in each molecule an average of two silicon-bonded aminoxy groups, (D) 1 to 100 mass parts of an ionic emulsifying agent, (E) 0.1 to 50 mass parts of a non-ionic emulsifying agent, and (F) 10 to 500 mass parts of water.

A vector data access unit includes data access ordering circuitry, for issuing data access requests indicated by elements of earlier and a later vector instructions, one being a write instruction. An element indicating the next data access for each of the instructions is determined. The next data accesses for the earlier and the later instructions may be reordered. The next data access of the earlier instruction is selected if the position of the earlier instruction's next data element is less than or equal to the position of the later instruction's next data element minus a predetermined value. The next data access of the later instruction may be selected if the position of the earlier instruction's next data element is higher than the position of the later instruction's next data element minus a predetermined value. Thus data accesses from earlier and later instructions are partially interleaved.

A method and circuit arrangement utilize a low latency variable transfer network between the register files of multiple processing cores in a multi-core processor chip to support fine grained parallelism of virtual threads across multiple hardware threads. The communication of a variable over the variable transfer network may be initiated by a move from a local register in a register file of a source processing core to a variable register that is allocated to a destination hardware thread in a destination processing core, so that the destination hardware thread can then move the variable from the variable register to a local register in the destination processing core.

A data processing system and method are disclosed. The system comprises an instruction-fetch stage where an instruction is fetched and a specific instruction is input into decode stage; a decode stage where said specific instruction indicates that contents of a register in a register file are used as an index, and then, the register file pointed to by said index is accessed based on said index; an execution stage where an access result of said decode stage is received, and computations are implemented according to the access result of the decode stage.

A technique for activating processor cores within a computer system is disclosed. Initially, a value representing a number of processor cores to be enabled within the computer system is received. The computer system includes multiple processors, and each of the processors includes multiple processor cores. Next, a scale variable value representing a specific type of tasks to be optimized during an execution of the tasks within the computer system is received. From a pool of available processor cores within the computer system, a subset of processor cores can be selected for activation. The subset of processor cores is activated in order to achieve system optimization during an execution of the tasks.

The disclosure provides a method for passing a parameter between processors. The method comprises the following steps: in a source program of a slave processor, directly introducing a static configuration parameter to be passed; obtaining a relative address of the static configuration parameter when converting the source program of the slave processor into a target program of the slave processor; and configuring directly, by a master processor, a parameter value of the static configuration parameter in the target program of the slave processor according to the obtained relative address of the static configuration parameter. The disclosure also provides a system for passing a parameter between processors. The system has no need to use external hardware such as a dual-port Random Access Memory (RAM) and a register, thus, the requirement of parameter transmission on the external hardware is reduced, and further the area and static power consumption of a chip are reduced. The disclosure reduces the cycle delay of the slave processor in accessing the dual-port RAM and the register, thereby effectively reducing the dynamic power consumption of the chip, improving the processing capability of the slave processor and enhancing the effective performance of the slave processor.

Augmented processor hardware contains a microcode interpreter. When encrypted microcode is included in a message from a service, the microcode may be passed to the microcode interpreter. Based on decryption and execution of the microcode taking place at the processor hardware, extended functionality may be realized.

A microprocessor having performs an architectural instruction that instructs it to perform an operation on first and second source operands to generate a result and to write the result to a destination register only if its architectural condition flags satisfy a condition specified in the architectural instruction. A hardware instruction translator translates the instruction into first and second microinstructions. To execute the first microinstruction, an execution pipeline performs the operation on the source operands to generate the result. To execute the second microinstruction, it writes the destination register with the result generated by the first microinstruction if the architectural condition flags satisfy the condition, and writes the destination register with the current value of the destination register if the architectural condition flags do not satisfy the condition.

A leading thread and a trailing thread are executed in parallel. Assuming that no transient fault occurs in each section, a system is speculatively executed in the section, with the leading thread and the trailing thread preferably being assigned to two different cores. At this time, the leading thread and the trailing thread are simultaneously executed, performing a buffering operation on a thread local area without performing a write operation on a shared memory. When the respective execution results of the two threads match each other, the content buffered to the thread local area is committed and written to the shared memory. When the respective execution results of the two threads do not match each other, the leading thread and the trailing thread are rolled back to a preceding commit point and re-executed.

A method for activating processor cores within a computer system is disclosed. Initially, a value representing a number of processor cores to be enabled within the computer system is received. The computer system includes multiple processors, and each of the processors includes multiple processor cores. Next, a scale variable value representing a specific type of tasks to be optimized during an execution of the tasks within the computer system is received. From a pool of available processor cores within the computer system, a subset of processor cores can be selected for activation. The subset of processor cores is activated in order to achieve system optimization during an execution of the tasks.

An array of a plurality of processing elements (PEs) are in a data packet-switched network interconnecting the PEs and memory to enable any of the PEs to access the memory. The network connects the PEs and their local memories to a common controller. The common controller may include a shared load/store (SLS) unit and an array control unit. A shared read may be addressed to an external device via the common controller. The SLS unit can continue activity as if a normal shared read operation has taken place, except that the transactions that have been sent externally may take more cycles to complete than the local shared reads. Hence, a number of transaction-enabled flags may not have been deactivated even though there is no more bus activity. The SLS unit can use this state to indicate to the array control unit that a thread switch may now take place.

Efficient data processing apparatus and methods include hardware components which are pre-programmed by software. Each hardware component triggers the other to complete its tasks. After the final pre-programmed hardware task is complete, the hardware component issues a software interrupt.

In accordance with embodiments, there are provided mechanisms and methods for controlling a process using a process map. These mechanisms and methods for controlling a process using a process map can enable process operations to execute in order without necessarily having knowledge of one another. The ability to provide the process map can avoid a requirement that the operations themselves be programmed to follow a particular sequence, as can further improve the ease by which the sequence of operations may be changed.

A microprocessor capable of running both x86 instruction set architecture (ISA) machine language programs and Advanced RISC Machines (ARM) ISA machine language programs. The microprocessor includes a mode indicator that indicates whether the microprocessor is currently fetching instructions of an x86 ISA or ARM ISA machine language program. The microprocessor also includes a plurality of model-specific registers (MSRs) that control aspects of the operation of the microprocessor. When the mode indicator indicates the microprocessor is currently fetching x86 ISA machine language program instructions, each of the plurality of MSRs is accessible via an x86 ISA RDMSR/WRMSR instruction that specifies an address of the MSR. When the mode indicator indicates the microprocessor is currently fetching ARM ISA machine language program instructions, each of the plurality of MSRs is accessible via an ARM ISA MRRC/MCRR instruction that specifies the address of the MSR.

A single software project in an integrated development environment (IDE) may be built for multiple target environments in a single build episode. Multiple different output artifacts may be generated by the build process for each of the target environments. The output artifacts are then deployed to the target environments, which may be homogeneous or heterogeneous environments. The same source project may be used to generate multiple output artifacts for the same target environment.

In one embodiment of the invention, a method is disclosed for modifying a pre-existing application program for multi-processing and/or distributed parallel processing. The method includes searching an application program for a computational loop; analyzing the computational loop to determine independence of the computational transactions of the computational loop; and replacing the computational loop with master code and slave code to provide master-slave execution of the computational loop in response to analyzing the computational loop to determine independence of the computational transactions of the computational loop. Multiple instances of the modified application program are executed to provide multi-processing and/or distributed parallel processing.

A method of automating the deployment of a number of enterprise applications on one or more computer data processing systems. Each enterprise application or update is stored in a dynamic distribution directory and is provided with identifying indicia, such as stage information, target information, and settings information. When automated enterprise deployment is invoked, computer instructions in a computer readable medium provide for initializing deployment, performing deployment, and finalizing deployment of the enterprise applications or updates.

The present invention relates to the field of perfumery and more particularly to the field of malodor counteractancy. In particular, it relates to a method for application of malodor counteracting (MOC) compositions capable of neutralizing in an efficient manner, through chemical reactions, malodors of a large variety of origins and which can be encountered in the air, on textiles, bathroom or kitchen surfaces, and the like. The composition may be applied as is or in the form of a perfuming composition or in a consumer product or article containing the compound or perfume composition.

A perfume tester or perfume includes a granule containing a friable peripheral portion incorporating fragrant compounds, which disintegrates as a perfumed powder when the granule is applied onto the skin. A method for making the perfume tester or perfume is by granulation, and the granule can be used in particular for perfume testing.

The present invention relates to some perfuming ingredients which are esters of formula (I) wherein R1 and R2 represent each a hydrogen atom or a methyl or ethyl group; and R3 represents a C5-C8 group of formula satured or unsatured linear, branched or cyclic group.

A film formed from a water-soluble polymer matrix within which is contained at least one fragrance is provided. The film is water-sensitive (e.g., water-soluble, water-dispersible, etc.) so that upon contact with a sufficient amount of water, the polymer matrix loses its integrity over time to increasingly expose the fragrance to the ambient environment for releasing its odor. The ability to incorporate a fragrance into the polymer matrix is achieved in the present invention by controlling a variety of aspects of the film construction, including the nature of the fragrance, the nature of the water-soluble polymer, the manner in which the polymer matrix and fragrance are melt processed, etc. For example, the fragrance may be injected directly into the extruder and melt blended with the water-soluble polymer. In this manner, the costly and time-consuming steps of pre-encapsulation or pre-compounding of the fragrance into a masterbatch are not required. Furthermore, to obtain a balance between the ability of the fragrance to release the desired odor during use and likewise to minimize the premature exhaustion of the odor during melt processing, the fragrance is selected to have a boiling point (at atmospheric pressure) within a certain range, such as from about 125° C. to about 350° C.

The present invention relates to compounds of formula (I) in the form of any one of its stereoisomers or a mixture thereof, and wherein R1 represents a substituent of the benzene ring and is a bromine atom or a linear, branched or cyclic C1-8 alkyl, alkenyl, alkoxy or alkenyloxy group; R2 represents a C1-3 alkyl group; and R3 represents a hydrogen atom or a methyl or ethyl group; and their use as perfuming ingredients, for instance to impart odor notes of the watery/ozone type.

Disclosed herein are processes for alcohol production by reducing an esterification product, such as ethyl acetate. The processes comprise esterifying acetic acid and an alcohol such as ethanol to produce an esterification product. The esterification product may be recovered using an extractive separation. The esterification product is reduced with hydrogen in the presence of a catalyst to obtain a crude reaction mixture comprising the alcohol, in particular ethanol, which may be separated from the crude reaction mixture.

A para-methoxy protected benzaldehyde useful in preparation of treprostinil, and of formula: (Formula (1)) is prepared by subjecting to Claisen re-arrangement a substituted benzaldehyde of formula (1a): (Formula (Ia)) to form the m-hydroxy-substituted benzaldehyde of formula (1b): (Formula (Ib)) and then reacting compound (1b) with a p-methoxybenzyl (PMB) compound to form a PMB-substituted benzaldehyde of formula (1).

A polyether polyol based on renewable materials is obtained by the in situ production of a polyether from a hydroxyl group-containing vegetable oil, at least one alkylene oxide and a low molecular weight polyol having at least 2 hydroxyl groups. The polyol is produced by introducing the hydroxyl group-containing vegetable oil, a catalyst and an alkylene oxide to a reactor and initiating the alkoxylation reaction. After the alkoxylation reaction has begun but before the reaction has been 20% completed, the low molecular weight polyol having at least 2 hydroxyl groups is continuously introduced into the reactor. After the in situ made polyether polyol product having the desired molecular weight has been formed, the in situ made polyether polyol is removed from the reactor. These polyether polyols are particularly suitable for the production of flexible polyurethane foams.

Processes are disclosed for the conversion of a carbohydrate source to hexamethylenediamine (HMDA) and to intermediates useful for the production of hexamethylenediamine and other industrial chemicals. HMDA is produced by direct reduction of a furfural substrate to 1,6-hexanediol in the presence of hydrogen and a heterogeneous reduction catalyst comprising Pt or by indirect reduction of a furfural substrate to 1,6-hexanediol wherein 1,2,6-hexanetriol is produced by reduction of the furfural substrate in the presence of hydrogen and a catalyst comprising Pt and 1,2,6-hexanediol is then converted by hydrogenation in the presence of a catalyst comprising Pt to 1,6 hexanediol, each process then proceeding to the production of HMDA by known routes, such as amination of the 1,6 hexanediol. Catalysts useful for the direct and indirect production of 1,6-hexanediol are also disclosed.

A method for operating an internal combustion engine in which a speed-based feature of the internal combustion engine, which is correlated with an indicated mean effective pressure of the fuel, is determined during the warm-up of the internal combustion engine and an ideal fuel quantity, which is to be injected into at least one combustion chamber of the internal combustion engine during the warm-up, is ascertained therefrom.

Apparatus for orientating a user in a space wherein the space comprises a plurality of zones of which only certain zones constitute functional zones wherein each functional zone includes a first type device containing information relating to the position of the zone in the space and wherein the first type device is reactive to the presence of a second type device associated with the user to provide the user with the information to determine the orientation of the user in the space. A method of orientating the user within the space and guiding the user toward one or more features in the space is also disclosed.

Disclosed is a feature for a vehicle that enables taking precautionary actions in response to conditions on the road network around or ahead of the vehicle, in particular, a blind intersection along a section of road. A database that represents the road network is used to determine locations where a blind intersection is located along a section of road. Then, precautionary action data is added to the database to indicate a location at which a precautionary action is to be taken about the blind intersection located along the section of road. A precautionary action system installed in a vehicle uses this database, or a database derived therefrom, in combination with a positioning system to determine when the vehicle is at a location that corresponds to the location of a precautionary action. When the vehicle is at such a location, a precautionary action is taken by a vehicle system as the vehicle is approaching a blind intersection.

Dive computers in accordance with embodiments of the invention are disclosed that store information concerning a dive site. The stored information can be accessed during the dive to provide information concerning such things as points of interest and/or hazards. One embodiment of the invention includes a processor, memory connected to the processor, a pressure transducer connected to the processor and configured to measure depth, and a display connected to the processor. In addition, the memory contains factual information concerning a dive site, and the processor is configured to display at least a portion of the stored factual information concerning the dive site via the display.

Provided are an apparatus and method of providing path information based on a status of a path and/or a purpose of the use of the path. A path information providing server collects environmental information from a sensing device. The path information providing server receives a path information request including a departure and a destination from a terminal device, and provides path information generated by mapping environmental data to a searched path.

Aspects of the invention relate to techniques of generating guiding patterns for via-type feature groups. A guiding pattern may be constructed for a via-type feature group that comprises two or more via-type features in a layout design. A backbone structure may then be determined for the guiding pattern. Based on the backbone structure and a self-assembly model, simulated locations of the two or more via-type features are computed. The simulated locations are compared with targeted locations. If the simulated locations do not match the targeted locations based on a predetermined criterion, the simulated locations adjusted to derive modified locations. Using the modified locations, the above operations may be repeated until the simulated locations match the targeted location based on a predetermined criterion or for a predetermined number of times.

In a method for fracturing or mask data preparation or mask process correction for charged particle beam lithography, a plurality of shots are determined that will form a pattern on a surface, where shots are determined so as to reduce sensitivity of the resulting pattern to changes in beam blur (βf). In some embodiments, the sensitivity to changes in βf is reduced by varying the charged particle surface dosage for a portion of the pattern. Methods for forming patterns on a surface, and for manufacturing an integrated circuit are also disclosed, in which pattern sensitivity to changes in βf is reduced.

A via disposition information acquiring unit acquires via disposition information indicating a disposition of the plurality of first vias (212). A second conductor information acquiring unit acquires second conductor information indicating disposition positions of a plurality of second conductors (232) repeatedly disposed in the second conductor layer (230). A via extracting unit extracts an extraction via with respect to each of the plurality of second conductors (232). The extraction via is each of the first vias (212) overlapping the second conductor (232). A via selecting unit selects a selection via with respect to each of the plurality of second conductors (232). The selection via is each of first vias (212) selected in a predetermined number from the extraction vias. An opening introducing unit introduces a first opening (234) to each of the plurality of second conductors (232). The first opening (234) overlaps the extraction via not selected by the via selecting unit in plan view.

Methods for the design of microwave filters comprises comprising preferably the steps of inputting a first set of filter requirements, inputting a selection of circuit element types, inputting a selection of lossless circuit response variables, calculating normalized circuit element values based on the input parameters, and generate a first circuit, insert parasitic effects to the normalized circuit element values of the first circuit, and output at least the first circuit including the post-parasitic effect circuit values. Additional optional steps include: requirements to a normalized design space, performing an equivalent circuit transformation, unmapping the circuit to a real design space, performing a survey, and element removal optimization. Computer implement software, systems, and microwave filters designed in accordance with the method are included.

A method, an apparatus, and a computer program product for wireless communication are provided. The apparatus generates a plurality of interconnect patterns for a set of longitudinal channels that are occupied by horizontal interconnects. Each interconnect pattern may be different from the other interconnect patterns. Each interconnect pattern may define relative locations for the set of horizontal interconnects and gap channels. Highest crosstalk is determined for each of the interconnect patterns and the interconnect pattern with the minimum highest crosstalk is selected as a preferred pattern. The highest crosstalk may comprise far-end crosstalk or near-end crosstalk and may be calculated for a range of frequencies or for a plurality of frequencies. The crosstalk may be calculated by modeling the interconnects as transmission lines.

Methods and systems for managing data loads on a cluster of processors that implement an iterative procedure through parallel processing of data for the procedure are disclosed. One method includes monitoring, for at least one iteration of the procedure, completion times of a plurality of different processing phases that are undergone by each of the processors in a given iteration. The method further includes determining whether a load imbalance factor threshold is exceeded in the given iteration based on the completion times for the given iteration. In addition, the data is repartitioned by reassigning the data to the processors based on predicted dependencies between assigned data units of the data and completion times of a plurality of the processers for at least two of the phases. Further, the parallel processing is implemented on the cluster of processors in accordance with the reassignment.

A method and system for optical proximity correction (OPC) is disclosed in which a set of shaped beam shots is determined which, when used in a shaped beam charged particle beam writer, will form a pattern on a reticle, where some of the shots overlap, where the pattern on the reticle is an OPC-corrected version of an input pattern, and where the sensitivity of the pattern on the reticle to manufacturing variation is reduced. A method for fracturing or mask data preparation is also disclosed.

A circuit-design support method includes obtaining information for a circuit having a logic circuit in which signal lines are connected to input terminals, signals of the signal lines being output via the logic circuit; obtaining information concerning a control circuit that has a first flip-flop for scanning and that can control a value of a given signal line by a value set by the first flip-flop; selecting, based on the circuit information, a second flip-flop at an output destination of a signal from the logic circuit, among second flip-flops of the circuit; and generating, based on the control circuit information, information indicating a serial connection of the control circuit between an output source of the signal of the given signal line and the given signal line and a connection of a data input terminal of the first flip-flop and an output terminal of the selected second flip-flop.

Routing methods for an integrated circuit design layout are disclosed. The layout can include design netlists and library cells. A multiple-level global routing can generate topological wire for each net. An area oriented graph-based detail routing on the design can be performed. A post route optimization after the detail routing can be performed to further improve the routing quality. Some methods can be single threaded all or some of the time, and/or multi-threaded some or all of the time.

The present invention is a solid rinse aid composition and methods of making and using the same. Applicants have surprisingly found that the crystal modifier sodium xylene sulfonate (short chain alkyl benzene or alkyl naphthalene sulfonates) at higher percentage can act as a solidification agent. The solid rinse aid composition generally includes an short chain alkyl benzene or alkyl naphthalene sulfonates solidification agent and an effective amount of a surfactant which can include a sheeting agent component, defoamer component and/or association disruption agent. The solid rinse aid composition may be phosphate-free, aminocarboxylate-free, and GRAS if desired.

A liquid detergent composition containing (A) 10 to 70 mass % of a nonionic surfactant, (B) 1 to 15 mass % of an anionic surfactant, (C) 0.01 to 2 mass % of a protease, and (D) 0.001 to 0.1 mass % of at least one compound selected from the group consisting of thiazole-based compounds and sulfur-containing amino acids.

The invention describes a stable liquid washing agent or liquid cleaning agent having a yield point and very good dispersing properties. The agents contain anionic and nonionic surfactants as well as inorganic salt and cosurfactant. The invention also relates to the use of the liquid washing agent or liquid cleaning agent, and to a method for manufacturing it.

A chemical composition for cleaning a medium is provided. For some embodiments, the chemical composition comprises a nonionic surfactant, an inorganic salt, a glycol compound, a chelating agent, and deionized water. For example, the chemical composition may comprise between about 1% and 5% of nonionic surfactant, between about 2% and 6% by weight of an inorganic salt, between about 5% and 10% by weight of a glycol compound, between about 5% and 10% by weight of a chelating agent, and deionized water.