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Process for eliminating or reducing persistent organic pollutants contained in particles

A treatment process of persistent organic pollutants contained in particles is provided. Said process includes reacting persistent organic pollutant in particles under hydrothermal conditions in the presence of Fe2+ and Fe3+. Several beneficial effects can be achieved, including 1) no other additive is needed during the reaction process; 2) Fe2+ and Fe3+ are safe, cheap and extensive sources; 3) because Fe2+ and Fe3+ are dissolved, they can fully disperse into particles, and fully contact can be achieved, thus obtaining a decomposition rate no less than 70% of the persistent organic pollutants is under subcritical conditions.




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Treatment method for spent caustic soda

An embodiment of the present invention relates to a method for treating spent caustic soda generated from an oil refinery process, a petrochemical process, etc. through a process in which a series of treatment steps are integrated, wherein the method can constitute a process under mild conditions excluding high temperature and/or high pressure conditions and can be advantageous to a post treatment process since the amount of by-products is small.




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High speed and low power circuit structure for barrel shifter

A barrel shifter uses a sign magnitude to 2's complement converter to generate decoder signals for its cascaded multiplexer selectors. The sign input receives the shift direction and the magnitude input receives the shift amount. The sign magnitude to 2's complement converter computes an output result as a 2's complement of the shift amount using the shift direction as a sign input, assigns a first portion (most significant bit half) of the output result to a first decoder signal, and assigns a second portion (least significant bit half) of the output result to a second decoder signal. This encoding scheme allows the decoder circuits to be relatively simple, for example, 3-to-8 decoders for an implementation adapted to shift a 64-bit operand value rather than the 4-to-9 decoder required in a conventional barrel shifter, leading to faster operation, less area, and reduced power consumption.




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Individual-specific information generation apparatus and individual-specific information generation method

The generation of individual-specific information having a good reliability and uniqueness is made possible with a little circuit scale. For this purpose, in an individual-specific information generation apparatus, a plurality of digital circuits are in the same circuit configuration. Each of the digital circuits outputs a fixed or a random number output value individually without their output with respect to a certain input being determined unambiguously among the digital circuits. In each of the digital circuit, an order is defined in advance. A random number judgment unit judges whether the output value is a random value or fixed, for each of the plurality of digital circuits. An individual-specific information generation unit generates the individual-specific information based on information of the order defined in the digital circuit judged by the random number judgment unit as having a fixed output value among the plurality of digital circuits and the output value.




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Processor and operating method

Disclosed is a processor that is able to efficiently execute DFT operations without having part of a basic operational circuit idle even during non-DFT-operation processing. The processor (1) has an operational means (operation unit) (2) and a control means (control unit) (3). The operation means (2) has a plurality of shift addition-and-subtraction means connected such that CORDIC (COordinate Rotation DIgital Computer) operations can be executed. The shift adding-and-subtracting means also execute shift addition-and-subtraction processing of butterfly operations that process shift addition-and-subtraction for one stage or more. The control means (3) instructs the operation means (2) to execute either CORDIC operations or butterfly operations, based on a plurality of data received from the outside.




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Recursive type-IV discrete cosine transform system

A recursive type-IV discrete cosine transform system includes a first permutation device, a recursive type-III discrete cosine/sine transform device, a cosine/sine factor generation device, a recursive type-II discrete cosine/sine transform device, a second permutation device. The first permutation device performs two-dimensional order permutation operation on N digital signals for generating N two-dimensional first temporal signals. The recursive type-III discrete cosine/sine transform device repeats a type-III discrete cosine/sine transform for generating second temporal signals. The cosine/sine factor generation device sequentially performs cosine/sine factor multiplication and corresponding addition operations for generating third temporal signals. The recursive type-II discrete cosine/sine transform device repeats a type-II discrete cosine/sine transform for generating fourth temporal signals. The second permutation device performs a one-dimensional order permutation operation for generating N one-dimensional output signals. The N one-dimensional output signals are obtained by performing a type-IV discrete cosine transform on the N digital input signals.




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Rectangular power spectral densities of orthogonal functions

In this application, a set of orthogonal functions is introduced whose power spectral densities are all rectangular shape. To find the orthogonal function set, it was considered that their spectrums (Fourier transforms of the functions) are either real-valued or imaginary-valued, which are corresponding to even and odd real-valued time domain signals, respectively. The time domain functions are all considered real-valued because they are actually physical signals. The shape of the power spectral densities of the signals are rectangular thus, the Haar orthogonal function set can be employed in the frequency domain to decompose them to several orthogonal functions. Based on the inverse Fourier transform of the Haar orthogonal functions, the time domain functions with rectangular power spectral densities can be determined. This is equivalent to finding the time-domain functions by taking the inverse Fourier transform of the frequency domain Walsh functions. The obtained functions are sampled and truncated to generate finite-length discrete signals. Truncation destroys the orthogonality of the signals. The Singular Value Decomposition method is used to restore the orthogonality of the truncated discrete signals.




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Method and apparatus for performing logical compare operations

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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Method and apparatus for performing logical compare operations

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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System and method of operating a computing device to perform memoization including transforming input/output parameters to reduce redundancies and efficiently cache data

A system (200) and a method (100) of operating a computing device to perform memoization are disclosed. The method includes determining whether a result of a function is stored in a cache and, if so, retrieving the result from the cache and, if not, calculating the result and storing it in the cache. The method (100) includes transforming (104) by the computing device at least one selected from the input parameters and the output parameters of the function, the transforming being based on an analysis of the function and its input arguments to establish whether or not there is a possible relationship reflecting redundancy among the input parameters and output parameters of the function. The transforming may include at least one of: use of symmetry, scaling, linear shift, interchanging of variables, inversion, polynomial and/or trigonometric transformations, spectral or logical transformations, fuzzy transformations, and systematic arrangement of parameters.




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Method and apparatus for performing logical compare operation

A method and apparatus for including in a processor instructions for performing logical-comparison and branch support operations on packed or unpacked data. In one embodiment, instruction decode logic decodes instructions for an execution unit to operate on packed data elements including logical comparisons. A register file including 128-bit packed data registers stores packed single-precision floating point (SPFP) and packed integer data elements. The logical comparisons may include comparison of SPFP data elements and comparison of integer data elements and setting at least one bit to indicate the results. Based on these comparisons, branch support actions are taken. Such branch support actions may include setting the at least one bit, which in turn may be utilized by a branching unit in response to a branch instruction. Alternatively, the branch support actions may include branching to an indicated target code location.




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Polymerization reactor for producing super absorbent polymers and method of producing super absorbent polymers using the polymerization reactor

The present invention provides a polymerization reactor for producing a super absorbent polymer comprising: a reaction unit; a monomer composition supply unit being connected to the reaction unit and supplying a monomer composition solution containing a monomer, a photoinitiator, and a solvent; an agitating shaft extended in the reaction unit from one end of the reaction unit connected to the monomer composition supply unit to the other end of the reaction unit; a plurality of agitating blades installed around the agitating shaft; and a light irradiation unit providing light to the monomer composition solution furnished from the monomer composition supply unit, and a method of producing super absorbent polymers by using the same.




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Thiol-vinyl and thiol-yne systems for shape memory polymers

A variety of biomedical devices are provided which include thiol-ene or thiol-yne shape memory polymers. The biomedical devices of the invention are capable of exhibiting shape memory behavior at physiological temperatures and may be used in surgical procedures. Methods of making the devices of the invention are also provided.




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Method for making a dual curable ethylene propylene diene polymer rubber coating using a photoinitiator and a peroxide

A durable ambient light curable waterproof liquid rubber coating with volatile organic compound (VOC) content of less than 450 grams per liter made from ethylene propylene diene terpolymer (EPDM) in a solvent, a photoinitiator, an additive, pigments, and fillers, and a co-agent and a method for making the formulation, wherein the formulation is devoid of thermally activated accelerators.




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Crosslinkable curing super-branched polyester and cured product and preparation method thereof

A crosslinkable curing super-branched polyester and the cured product and the preparation method thereof are disclosed. The super-branched polyester has high refractive index and comprises a compound represented by the following structural formula (I). In the formula (I), HBP is the backbone of the super-branched polyester; both a and b are positive integers; the sum of a and b is less than or equal to n; n is more than or equal to 10 and less than 80. In the super-branched polyester, A is represented by formula (II) and N is represented by formula (III), wherein R is methyl or hydrogen atom; the mole ratio of N relative to the total mole of A and N is more than 30 mol %, and the ratio of the total mole of A and N relative to the product of the total mole of HBP backbone and n is more than 0.5 and less than or equal to 1.




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Radiation curable temporary laminating adhesive for use in high temperature applications

A radiation curable temporary laminating adhesive composition for use in temperature applications at 150° C. or greater, and typically at 200° C. or greater, comprises (A) a hydrogenated polybutadiene diacrylate; (B) a radical photoinitiator; and (C) a diluent.




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High temperature melting

The present invention relates to methods for making wear and oxidation resistant polymeric materials by high temperature melting. The invention also provides methods of making medical implants containing cross-linked antioxidant-containing tough and ductile polymers and materials used therewith also are provided.




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Modifying a dispersed storage network memory data access response plan

A dispersed storage network memory includes a pool of storage nodes, where the pool of storage nodes stores a multitude of encoded data files. A storage node obtains and analyzes data access response performance data for each of the storage nodes to produce a modified data access response plan that includes identity of an undesired performing storage node and an alternative data access response for the undesired performing storage node. The storage nodes receive corresponding portions of a data access request for at least a portion of one of the multitude of encoded data files. The undesired performing storage node or another storage node processes one of the corresponding portions of the data access request in accordance with the alternative data access response.




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System and method for generating a virtual PCI-type configuration space for a device

An electronic data tablet has a controller and transition manager. The controller is to store in a memory of the tablet virtual configuration space information for a peripheral device of a computer, and the transition manager is to control the controller to operate in a first mode and a second mode. The virtual configuration space information is stored in the tablet memory when the first mode is to be switched to the second mode. When the second mode is switched to the first mode, the virtual configuration space information is accessed to control recognition of the peripheral device of the computer without performing a re-scanning operation.




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Semiconductor memory device and operation method thereof

A semiconductor memory device includes a selection signal generation unit configured to generate a plurality of selection signals that are sequentially activated, a path selection unit configured to select a transmission path of sequentially input information data in response to the plurality of selection signals, a plurality of first storage units, each configured to have a first storage completion time and store an output signal of the path selection unit, and a plurality of second storage units, each configured to have a second storage completion time, which is longer than the first storage completion time, and store a respective output signal of the plurality of first storage units.




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Methods and systems for mapping a peripheral function onto a legacy memory interface

A memory system includes a CPU that communicates commands and addresses to a main-memory module. The module includes a buffer circuit that relays commands and data between the CPU and the main memory. The memory module additionally includes an embedded processor that shares access to main memory in support of peripheral functionality, such as graphics processing, for improved overall system performance. The buffer circuit facilitates the communication of instructions and data between CPU and the peripheral processor in a manner that minimizes or eliminates the need to modify CPU, and consequently reduces practical barriers to the adoption of main-memory modules with integrated processing power.




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Data storage device and operating method thereof

A data storage device includes a first memory device configured to store data having a first property, a second memory device configured to store data having a second property, and a controller. The controller selects data stored in the first memory device, and transfers the selected data to the second memory device or stores the selected data in another physical location of the first memory device selectively depending on an update count (UC) of an address at which the selected data is stored.




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Bridge between a peripheral component interconnect express interface and a universal serial bus 3.0 device

A bridge includes a Peripheral Component Interconnect Express interface supporting at least two lanes, an Extensible Host Controller Interface, and a Universal Serial Bus 3.0 root hub. The Peripheral Component Interconnect Express interface is used for coupling to a host. Each lane of the at least two lanes provides a highest data transmission speed. The Extensible Host Controller Interface is coupled to the Peripheral Component Interconnect Express interface for storing data transmitted by the Peripheral Component Interconnect Express interface. The Universal Serial Bus 3.0 root hub includes a first controller and a second controller. The first controller and the second controller are used for controlling data transmission of four ports, and a highest data transmission speed provided by each port of the four ports is not more than the highest data transmission speed provided by the lane.




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System and method for detecting accidental peripheral device disconnection

A detection device for detecting the manner in which a peripheral device is removed from an electronic device is proposed. The detection device can be on the peripheral device or the electronic device and detects whether the peripheral device was removed in a manner that indicates the removal was intentional or unintentional.




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Apparatuses enabling concurrent communication between an interface die and a plurality of dice stacks, interleaved conductive paths in stacked devices, and methods for forming and operating the same

Various embodiments include apparatuses, stacked devices and methods of forming dice stacks on an interface die. In one such apparatus, a dice stack includes at least a first die and a second die, and conductive paths coupling the first die and the second die to the common control die. In some embodiments, the conductive paths may be arranged to connect with circuitry on alternating dice of the stack. In other embodiments, a plurality of dice stacks may be arranged on a single interface die, and some or all of the dice may have interleaving conductive paths.




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Electronic devices and methods for sharing peripheral devices in dual operating systems

A method for sharing peripheral devices in dual operating systems for an electronic device having at least one peripheral device is provided. The method includes: receiving a setting value for the peripheral device under the first operating system from a user; activating a second operating system; transmitting the setting value to the second operating system; and switching from the first operating system to the second operating system, wherein the second operating system sets the peripheral device with the setting value and enables the electronic device to operate under the second operating system.




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System and method for below-operating system trapping and securing loading of code into memory

A system for protecting an electronic device against malware includes a memory, an operating system configured to execute on the electronic device, and a below-operating-system security agent. The below-operating-system security agent is configured to trap an attempted access of a resource of the electronic device, access one or more security rules to determine whether the attempted access is indicative of malware, and operate at a level below all of the operating systems of the electronic device accessing the memory. The attempted access includes attempting to write instructions to the memory and attempting to execute the instructions.




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System and method for performing memory management using hardware transactions

The systems and methods described herein may be used to implement a shared dynamic-sized data structure using hardware transactional memory to simplify and/or improve memory management of the data structure. An application (or thread thereof) may indicate (or register) the intended use of an element of the data structure and may initialize the value of the data structure element. Thereafter, another thread or application may use hardware transactions to access the data structure element while confirming that the data structure element is still part of the dynamic data structure and/or that memory allocated to the data structure element has not been freed. Various indicators may be used determine whether memory allocated to the element can be freed.




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Management of inter-dependent configurations of virtual machines in a cloud

A server computer system determines that configuring a first virtual machine in a cloud depends on a configuration result of configuring a second virtual machine. The server computer system configures the second virtual machine in the cloud and configures the first virtual machine in the cloud using the configuration result of the second virtual machine.




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Converting dependency relationship information representing task border edges to generate a parallel program

According to an embodiment, based on task border information, and first-type dependency relationship information containing N number of nodes corresponding to data accesses to one set of data, containing edges representing dependency relationship between the nodes, and having at least one node with an access reliability flag indicating reliability/unreliability of corresponding data access; task border edges, of edges extending over task borders, are identified that have an unreliable access node linked to at least one end, and presentation information containing unreliable access nodes is generated. According to dependency existence information input corresponding to the set of data, conversion information indicating absence of data access to the unreliable access nodes is output. According to the conversion information, the first-type dependency relationship information is converted into second-type dependency relationship information containing M number of nodes (0≦M≦N) corresponding to data accesses to the set of data and containing edges representing inter-node dependency relationship.




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***WITHDRAWN PATENT AS PER THE LATEST USPTO WITHDRAWN LIST***Data transfer control apparatus, data transfer control method, and computer product

A data transfer control apparatus includes a transferring unit that transfers data from a transfer source memory to a transfer destination memory, according to an instruction from a first processor; and a first processor configured to detect a process execute by the first processor, determine whether transfer of the data is urgent, based on the type of the detected process, and control the transferring unit or the first processor to transfer the data, based on a determination result.




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Method and apparatus for continuously producing 1,1,1,2,3-pentafluoropropane with high yield

A method and apparatus for method of continuously producing 1,1,1,2,3-pentafluoropropane with high yield is provided. The method includes (a) bringing a CoF3-containing cobalt fluoride in a reactor into contact with 3,3,3-trifluoropropene to produce a CoF2-containing cobalt fluoride and 1,1,1,2,3-pentafluoropropane, (b) transferring the CoF2-containing cobalt fluoride in the reactor to a regenerator and bringing the transferred CoF2-containing cobalt fluoride into contact with fluorine gas to regenerate a CoF3-containing cobalt fluoride, and (c) transferring the CoF3-containing cobalt fluoride in the regenerator to the reactor and employing the transferred CoF3-containing cobalt fluoride in Operation (a). Accordingly, the 1,1,1,2,3-pentafluoropropane can be continuously produced with high yield from the 3,3,3-trifluoropropene using a cobalt fluoride (CoF2/CoF3) as a fluid catalyst, thereby improving the reaction stability and readily adjusting the optimum conversion rate and selectivity.




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Synthesis of alkyl cyclopentadiene compounds

A method of synthesizing an alkyl cyclopentadiene compound is disclosed. The method includes contacting at least one cyclopentadienyl anion source and at least one alkyl group source to form at least one alkyl cyclopentadiene compound. The method further includes extracting the alkyl cyclopentadiene compound with a hydrocarbon solvent. The alkyl cyclopentadiene compound may be converted to a metallocene catalyst compound.




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Process for producing 2,3,3,3-tetrafluoropropene

The instant invention relates to a process and method for manufacturing 2,3,3,3-tetrafluoropropene by dehydrohalogenating a reactant stream of 2-chloro-1,1,1,2-tetrafluoropropane that is substantially free from impurities, particularly halogenated propanes, propenes, and propynes.




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Method for producing pentafluoroethane

The present invention aims in a method wherein tetrachloroethylene (PCE) is reacted with HF in a gas phase in the presence of a catalyst to obtain pentafluoroethane (HFC-125), to reduce production of undesirable by-products and maintain a catalytic activity at a high level over a long period of time while achieving a high conversion ratio of PCE and suppressing deterioration of the catalyst. In a method for producing pentafluoroethane wherein tetrachloroethylene is reacted with HF in a gas phase in the presence of a catalyst to obtain pentafluoroethane, characterized in that chromium oxyfluoride is disposed in a reactor as the catalyst, and oxygen is fed into the reactor together with tetrachloroethylene and HF, at a amount of 0.4-1.8% by mole with respect to tetrachloroethylene.




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Method for purifying 2,3,3,3-tetrafluoropropene

The present invention provides a method for purifying HFO-1234yf, comprising the steps of (1) cooling a liquid mixture containing HFO-1234yf and HF to separate the mixture into a upper liquid phase having a high concentration of HF and a lower liquid phase having a high concentration of 2,3,3,3-tetrafluoropropene; and (2) subjecting the lower liquid phase obtained in step (1) to a distillation operation to withdraw a mixture containing HFO-1234yf and HF from a top of a distillation column, thereby obtaining substantially HF-free HFO-1234yf from a bottom of the distillation column. According to the present invention, HF and HFO-1234yf contained in a mixture containing HF and HFO-1234yf can be separated under simple and economically advantageous conditions.




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Process for producing 1,2-dichloro-3,3,3-trifluoropropene

Disclosed is a process for producing 1,2-dichloro-3,3,3-trifluoropropene, which is characterized by that 1-halogeno-3,3,3-trifluoropropene represented by the general formula [1]: (In the formula, X represents a fluorine atom, chlorine atom or bromine atom.) is reacted with chlorine in a gas phase in the presence of a catalyst. It is possible by this process to produce 1,2-dichloro-3,3,3-trifluoropropene in an industrial scale with good yield by using 1-halogeno-3,3,3-trifluoropropene, which is available with a low price, as the raw material.




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Production method for 1-chloro-3,3,3-trifluoropropene

A production method of 1-chloro-3,3,3-trifluoropropene according to the present invention includes reaction of 1,1,1,3,3-pentachloropropane with hydrogen fluoride, characterized in that the concentrations of respective catalytic components in the 1,1,1,3,3-pentachloropropane as the raw material is controlled to a predetermined level or less. By controlling the concentrations of the respective catalytic components in the 1,1,1,3,3-pentachloropropane to the predetermined level or less, it is possible to improve the problems of shortening of catalyst life, retardation of reaction and scaling or corrosion of equipment in the production of the 1-chloro-3,3,3-trifluoropropene. In addition, the 1,1,1,3,3-pentachloropropane can be obtained selectively with high yield by telomerization reaction of carbon tetrachloride and vinyl chloride. The present invention is thus useful as the method for industrially advantageous, high-yield production of the 1-chloro-3,3,3-trifluoropropene.




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Process to make 1,1,2,3-tetrachloropropene

Disclosed is a process for the synthesis of 1,1,2,3-tetrachloropropene (HCC-1230xa) using 1,1,3-trichloropropene (HCC-1240za) and/or 3,3,3-trichloropropene (HCC-1240zf) and Cl2 gas as the reactants, wherein the process takes place in a single reactor system. Before this invention, HCC-1230xa was made in a two-step process using HCC-1240za/HCC-1240zf and Cl2 gas, and the processing was conducted using two separate reactors.




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Liquid crystal compound having perfluoroalkyl chain, and liquid crystal composition and liquid crystal display device

The invention is to provide a new liquid crystal compound having a high clearing point, a good compatibility with other compounds, a small viscosity, and a high stability to heat, light and so forth; compound (1) is provided: R1CF2nR2 (1) wherein, for example, R1 is alkyl having 4 to 10 carbons or —(CH2)2—CH═CH2, R2 is alkyl having 2 to 10 carbons, n is 8, and R1 and R2 are not allowed to be straight-chain alkyl having an identical number of carbons.




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Methods for producing 1-chloro-3,3,3-trifluoropropene from 2-chloro-3,3,3-trifluoropropene

The present invention provides processes for the production of HCFO-1233zd, 1-chloro-3,3,3-trifluoropropene, from the starting material, 2-chloro-3,3,3-trifluoropropene (HCFO-1233xf). In a first process, HCFO-1233zd is produced by the isomerization of HCFO-1233xf. In a second process, HCFO-1233zd is produced in a two-step procedure which includes (i) dehydrochlorination of HCFO-1233xf into trifluoropropyne; and (ii) hydrochlorination of the trifluoropropyne into HCFO-1233zd.




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Integrated process for the production of 1-chloro-3,3,3-trifluoropropene

The present invention is directed to processes for the production of 1233zd from 240fa and HF, with or without a catalyst, at a commercial scale. The 240fa and HF are fed to a reactor operating at high pressure. The resulting product stream comprising 1233zd, HCl, HF, and other byproducts is treated to one or more purification techniques including phase separation and one or more distillations to provide purified 1233zd, which meets commercial product specifications, i.e., having a GC purity of 99.5% or greater.




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Use of copper-nickel catalysts for dehlogenation of chlorofluorocompounds

The disclosure describes a process for dehalogenation of chlorofluorocompounds. The process comprises contacting a saturated chlorofluorocompound with hydrogen in the presence of a catalyst at a temperature sufficient to remove chlorine and/or fluorine substituents to produce a fluorine containing terminal olefin.




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Reactor and agitator useful in a process for making 1-chloro-3,3,3-trifluoropropene

Disclosed is a reactor and agitator useful in a high pressure process for making 1-chloro-3,3,3-trifluoropropene (1233zd) from the reaction of 1,1,1,3,3-pentachloropropane (240fa) and HF, wherein the agitator includes one or more of the following design improvements: (a) double mechanical seals with an inert barrier fluid or a single seal;(b) ceramics on the rotating faces of the seal;(c) ceramics on the static faces of seal;(d) wetted o-rings constructed of spring-energized Teflon and PTFE wedge or dynamic o-ring designs; and(e) wetted metal surfaces of the agitator constructed of a corrosion resistant alloy.




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Azeotropic or azeotrope-like composition, and method for producing 2,3,3,3-tetrafluoropropene or chloromethane

To provide a method for efficiently separating 2,3,3,3-tetrafluoropropene (HFO-1234yf) and chloromethane (R40) from a composition comprising HFO-1234yf and R40. An azeotrope-like composition comprising from 58 to 78 mol % of HFO-1234yf and from 22 to 42 mol % of R40, and a method for producing HFO-1234yf, which comprises steps of distilling an initial mixture containing HFO-1234yf in a content exceeding 63 mol % in the total amount of HFO-1234yf and R40, thereby to separate the initial mixture into a first fraction in which the content of HFO-1234yf in the total amount of HFO-1234yf and R40 is lower than the content of HFO-1234yf in the total amount of HFO-1234yf and R40 in the initial mixture, and a second fraction in which the content of HFO-1234yf in the total amount of HFO-1234yf and R40 is higher than the content of HFO-1234yf in the total amount of HFO-1234yf and R40 in the initial mixture, and then obtaining HFO-1234yf having a reduced R40 concentration, from the second fraction.




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Process for 1-chloro-3,3,3-trifluoropropene from trifluoromethane

The present invention provides routes for making 1-chloro-3,3,3-trifluoropropene (HCFO-1233zd) from commercially available raw materials. More specifically, this invention provides routes for HCFO-1233zd from inexpensive and commercially available trifluoromethane (HFC-23).




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Process for 1-chloro-3,3,3-trifluoropropene from trifluoropropene

The present invention provides routes for making 1-chloro-3,3,3-trifluoropropene (HCFO-1233zd) from commercially available raw materials. More specifically, this invention provides several routes for forming HCFO-1233zd from 3,3,3-trifluoropropene (FC-1234zf).




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Process for producing 2-chloro-1,3,3,3-tetrafluoropropene

Disclosed is a process for producing 2-chloro-1,3,3,3-tetrafluoropropene (1224), including a first step of separating 2,3-dichloro-1,1,1,3-tetrafluoropropane (234da) into erythro form and threo form, and a second step of bringing the separated erythro form or threo form in contact with a base to obtain 2-chloro-1,3,3,3-tetrafluoropropene (1224). The first step is a step of separating 234da by distillation to achieve a separation into a fraction containing mainly erythro form and a fraction containing mainly threo form. In the second step, 1224 cis form is obtained from the erythro form, and 1224 trans form is obtained from the threo form. By this process, it is possible to selectively and efficiently produce cis form or trans form of 2-chloro-1,3,3,3-tetrafluoropropene (1224).




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Process for producing 2,3,3,3-tetrafluoropropene

This invention provides a process for producing 2,3,3,3-tetrafluoropropene, the process comprising: (1) a first reaction step of reacting hydrogen fluoride with at least one chlorine-containing compound selected from the group consisting of a chloropropane represented by Formula (1): CClX2CHClCH2Cl, wherein each X is the same or different and is CI or F, a chloropropene represented by Formula (2): CClY2CCl═CH2, wherein each Y is the same or different and is CI or F, and a chloropropene represented by Formula (3): CZ2═CClCH2Cl, wherein each Z is the same or different and is CI or F in a gas phase in the absence of a catalyst while heating; and (2) a second reaction step of reacting hydrogen fluoride with a reaction product obtained in the first reaction step in a gas phase in the presence of a fluorination catalyst while heating. According to the process of this invention, 2,3,3,3-tetrafluoropropene (HFO-1234yf) can be obtained with high selectivity, and catalyst deterioration can be suppressed.




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Process for producing silica-comprising dispersions comprising polyetherols or polyether amines

Process for producing silica-comprising dispersions comprising a polyetherol or a polyether amine, which comprises the steps of (i) admixing an aqueous silica sol (K) having an average particle diameter of from 1 to 150 nm and a silica content, calculated as SiO2, of from 1 to 60% by weight and a pH of from 1 to 6 with at least one polyetherol (b1) and/or polyether amine (b2) based on ethylene oxide and/or propylene oxide and having an average OH or amine functionality of from 2 to 6 and a number average molecular weight of from 62 to 6000 g/mol,(ii) distilling off at least part of the water,(iii) admixing the dispersion with at least one compound (S) having at least one at least monoalkoxylated silyl group and at least one alkyl, cycloalkyl or aryl substituent, where this substituent may have groups which are reactive toward an alcohol, an amine or an isocyanate in an amount of from 0.1 to 20 μmol of (S) per m2 of surface area of (K), where steps (i) and (iii) can be carried out simultaneously or in succession in any order, (iv) optionally adjusting the pH of the silica-comprising dispersions obtained to a value of from 7 to 12 by adding a basic compound, where step (iv) can also be carried out between steps (ii) and (iii).