A method of making a semiconductor device can include providing a wafer comprising a plurality of semiconductor die, wherein each semiconductor die comprises an active surface and a backside opposite the active surface. A photosensitive layer can be formed over the wafer and on a backside of each of the plurality of semiconductor die within the wafer with a coating machine. An identifying mark can be formed within the photosensitive layer for each of the plurality of semiconductor die with a digital exposure machine and a developer, wherein a thickness of the identifying mark is less than or equal to 50 percent of a thickness of the photosensitive layer. The photosensitive layer can be cured. The wafer can be singulated into a plurality of semiconductor devices.

A semiconductor package is provided, including: an insulating base body having a first surface with an opening and a second surface opposite to the first surface; an insulating extending body extending outward from an edge of the first surface of the insulating base body, wherein the insulating extending body is less in thickness than the insulating base body; an electronic element having opposite active and inactive surfaces and disposed in the opening with its inactive surface facing the insulating base body; a dielectric layer formed in the opening of the insulating base body and on the first surface of the insulating base body, the insulating extending body and the active surface of the electronic element; and a circuit layer formed on the dielectric layer and electrically connected to the electronic element. The configuration of the insulating layer of the invention facilitates to enhance the overall structural rigidity of the package.

A semiconductor device includes a first moisture-resistant ring disposed in a peripheral region surrounding a circuit region on a semiconductor substrate in such a way as to surround the circuit region and a second moisture-resistant ring disposed in the peripheral region in such a way as to surround the first moisture-resistant ring.

Presented herein are an interconnect structure and method for forming the same. The interconnect structure includes a contact pad disposed over a substrate and a connector disposed over the substrate and spaced apart from the contact pad. A passivation layer is disposed over the contact pad and over connector, the passivation layer having a contact pad opening, a connector opening, and a mounting pad opening. A post passivation layer including a trace and a mounting pad is disposed over the passivation layer. The trace may be disposed in the contact pad opening and contacting the mounting pad, and further disposed in the connector opening and contacting the connector. The mounting pad may be disposed in the mounting pad opening and contacting the opening. The mounting pad may be separated from the trace by a trace gap, which may optionally be at least 10 μm.

A semiconductor mounting apparatus includes a storing unit that stores a liquid or a gas, a contact unit that comes into contact with a semiconductor chip when the storing unit is filled with the liquid or the gas, and a sucking unit that sucks up the semiconductor chip to bring the semiconductor chip into close contact with the contact unit.

A system for determining thickness variation values of a semiconductor substrate comprises a substrate vacuumed to a pedestal that defines a reference plane for measuring the substrate. A measurement probe assembly determines substrate CTV and BTV values, and defines a substrate slope angle. A thermal bonding assembly attaches a die to the substrate at a bonding angle congruent with the substrate slope angle. A plurality of substrates are measured using the same reference plane on the pedestal. Associated methods and processes are disclosed.

A bump-on-trace (BOT) interconnection in a package and methods of making the BOT interconnection are provided. An embodiment BOT interconnection comprises a landing trace including a distal end, a conductive pillar extending at least to the distal end of the landing trace; and a solder feature electrically coupling the landing trace and the conductive pillar. In an embodiment, the conductive pillar overhangs the end surface of the landing trace. In another embodiment, the landing trace includes one or more recesses for trapping the solder feature after reflow. Therefore, a wetting area available to the solder feature is increased while permitting the bump pitch of the package to remain small.

A method of ultrasonically bonding semiconductor elements includes the steps of: (a) aligning surfaces of a plurality of first conductive structures of a first semiconductor element to respective surfaces of a plurality of second conductive structures of a second semiconductor element; (b) ultrasonically forming tack bonds between ones of the first conductive structures and respective ones of the second conductive structures; and (c) forming completed bonds between the first conductive structures and the second conductive structures.

A semiconductor device includes a substrate comprising a trench; a gate dielectric layer formed over a surface of the trench; a gate electrode positioned at a level lower than a top surface of the substrate, and comprising a lower buried portion embedded in a lower portion of the trench over the gate dielectric layer and an upper buried portion positioned over the lower buried portion; and a dielectric work function adjusting liner positioned between the lower buried portion and the gate dielectric layer; and a dipole formed between the dielectric work function adjusting liner and the gate dielectric layer.

A method of forming a ferroelectric memory cell. The method comprises forming an electrode material exhibiting a desired dominant crystallographic orientation. A hafnium-based material is formed over the electrode material and the hafnium-based material is crystallized to induce formation of a ferroelectric material having a desired crystallographic orientation. Additional methods are also described, as are semiconductor device structures including the ferroelectric material.

Embodiments of the inventive concepts provide a method for manufacturing a semiconductor device. The method includes forming a stack structure including insulating layers and sacrificial layers which are alternately and repeatedly stacked on a substrate. A first photoresist pattern is formed on the stack structure. A first part of the stack structure is etched to form a stepwise structure using the first photoresist pattern as an etch mask. The first photoresist pattern includes a copolymer including a plurality of units represented by at least one of the following chemical formulas 1 to 3, wherein “R1”, “R2”, “R3”, “p”, “q” and “r” are the same as defined in the description.

A performance of a semiconductor device is improved. A film, which is made of silicon, is formed in a resistance element formation region on a semiconductor substrate, and an impurity, which is at least one type of elements selected from a group including a group 14 element and a group 18 element, is ion-implanted into the film, and a film portion which is formed of the film of a portion into which the impurity is ion-implanted is formed. Next, an insulating film with a charge storage portion therein is formed in a memory formation region on the semiconductor substrate, and a conductive film is formed on the insulating film.

A method of manufacturing a semiconductor device according to one embodiment includes forming a first film including a first metal above a processing target member. The method includes forming a second film including two or more types of element out of a second metal, carbon, and boron above the first film. The method includes forming a third film including the first metal above the second film. The method includes forming a mask film by providing an opening part to a stacked film including the first film, the second film and the third film. The method includes processing the processing target member by performing etching using the mask film as a mask.

Embodiments of the inventive concept provide a method for manufacturing a semiconductor device. The method includes forming a stack structure by alternately and repeatedly stacking insulating layers and sacrificial layers on a substrate, sequentially forming a first lower layer and a first photoresist pattern on the stack structure, etching the first lower layer using the first photoresist pattern as an etch mask to form a first lower pattern. A first part of the stack structure is etched to form a stepwise structure using the first lower pattern as an etch mask. The first lower layer includes a novolac-based organic polymer, and the first photoresist pattern includes a polymer including silicon.

Manufacturing methods of JFET-type compact three-dimensional memory (3D-MC) are disclosed. In a memory level stacked above the substrate, an x-line extends from a memory array to an above-substrate decoding stage. A JFET-type transistor is formed on the x-line as a decoding device for the above-substrate decoding stage, where the overlap portion of the x-line with the control-line (c-line) is semi-conductive.

A method of forming a semiconductor device is provided such that a trench is formed in a semiconductor body at a first surface of the semiconductor body. Dopants are introduced into a first region at a bottom side of the trench by ion implantation. A filling material is formed in the trench. Dopants are introduced into a second region at a top side of the filling material. Thermal processing of the semiconductor body is carried out and is configured to intermix dopants from the first and the second regions by a diffusion process along a vertical direction perpendicular to the first surface.

A semiconductor device is provided that includes an n-type field effect transistor including a plurality of vertically stacked silicon-containing nanowires located in one region of a semiconductor substrate, and a p-type field effect transistor including a plurality of vertically stacked silicon germanium alloy nanowires located in another region of a semiconductor substrate. Each vertically stacked silicon-containing nanowire of the n-type field effect transistor has a different shape than the shape of each vertically stacked silicon germanium alloy nanowire of the p-type field effect transistor.

To provide a semiconductor device having improved reliability. After formation of an n+ type semiconductor region for source/drain, a first insulating film is formed on a semiconductor substrate so as to cover a gate electrode and a sidewall spacer. After heat treatment, a second insulating film is formed on the first insulating film and a resist pattern is formed on the second insulating film. Then, these insulating films are etched with the resist pattern as an etching mask. The resist pattern is removed, followed by wet washing treatment. A metal silicide layer is then formed by the salicide process.

A method of fabricating a semiconductor device includes forming a gate strip including a dummy electrode and a TiN layer. The method includes removing a first portion of the dummy electrode to form a first opening over a P-active region and an isolation region. The method includes performing an oxygen-containing plasma treatment on a first portion of the TiN layer; and filling the first opening with a first metal material. The method includes removing a second portion of the dummy electrode to form a second opening over an N-active region and the isolation region. The method includes performing a nitrogen-containing plasma treatment on a second portion of the TiN layer; and filling the second opening with a second metal material. The second portion of the TiN layer connects to the first portion of the TiN layer over the isolation region.

A method for forming a semiconductor structure includes forming a strained silicon germanium layer on top of a substrate. At least one patterned hard mask layer is formed on and in contact with at least a first portion of the strained silicon germanium layer. At least a first exposed portion and a second exposed portion of the strained silicon germanium layer are oxidized. The oxidizing process forms a first oxide region and a second oxide region within the first and second exposed portions, respectively, of the strained silicon germanium.

The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.

A semiconductor structure is disclosed. The semiconductor structure includes a source trench in a drift region, the source trench having a source trench dielectric liner and a source trench conductive filler surrounded by the source trench dielectric liner, a source region in a body region over the drift region. The semiconductor structure also includes a patterned source trench dielectric cap forming an insulated portion and an exposed portion of the source trench conductive filler, and a source contact layer coupling the source region to the exposed portion of the source trench conductive filler, the insulated portion of the source trench conductive filler increasing resistance between the source contact layer and the source trench conductive filler under the patterned source trench dielectric cap. The source trench is a serpentine source trench having a plurality of parallel portions connected by a plurality of curved portions.

A semiconductor device includes a substrate comprising a channel region and a recess, wherein the recess is located at both side of the channel region; a gate structure formed over the channel region; a first SiP layer covering bottom corners of the gate structure and the recess; and a second SiP layer formed over the first SiP layer and in the recess, wherein the second SiP layer has a phosphorus concentration higher than that of the first SiP layer.

A method of production of a semiconductor device comprising a semiconductor layer forming step of forming a semiconductor layer including an inorganic oxide semiconductor on a board, a passivation film forming step of forming a passivation film comprising an organic material so as to cover the semiconductor layer, a baking step of baking the passivation film, and a cooling step of cooling the passivation film after baking, herein, in the cooling step, a cooling speed from a baking temperature at the time of baking in the baking step to a temperature 50° C. lower than the baking temperature is substantially controlled to 0.5 to 5° C./min in range is provided.

A method is provided for making smooth crystalline semiconductor thin-films and hole and electron transport films for solar cells and other electronic devices. Such semiconductor films have an average roughness of 3.4 nm thus allowing for effective deposition of additional semiconductor film layers such as perovskites for tandem solar cell structures which require extremely smooth surfaces for high quality device fabrication.

Provided are superconducting circuits and, more specifically, methods of forming such circuits. A method may involve forming a silicon-containing low loss dielectric (LLD) layer over a metal electrode such that metal carbides at the interface of the LLD layer and electrode. The LLD layer may be formed using chemical vapor deposition (CVD) at a temperature of less than about 500° C. At such a low temperature, metal silicides may not form even though silicon containing precursors may come in contact with metal of the electrode. Silicon containing precursors having silane molecules in which two silicon atoms bonded to each other (e.g., di-silane and tri-silane) may be used at these low temperatures. The LLD layer may include amorphous silicon, silicon oxide, or silicon nitride, and this layer may directly interface one or more metal electrodes. The thickness of LLD layer may be between about 1,000 Angstroms and 10,000 Angstroms.

A magnetoresistive random access memory (MRAM) structure includes a bottom electrode structure. A magnetic tunnel junction (MTJ) element is over the bottom electrode structure. The MTJ element includes an anti-ferromagnetic material layer. A ferromagnetic pinned layer is over the anti-ferromagnetic material layer. A tunneling layer is over the ferromagnetic pinned layer. A ferromagnetic free layer is over the tunneling layer. The ferromagnetic free layer has a first portion and a demagnetized second portion. The MRAM also includes a top electrode structure over the first portion.

An organic layer deposition assembly for depositing a deposition material on a substrate includes a deposition source configured to spray the deposition material, a deposition source nozzle arranged in one side of the deposition source and including deposition source nozzles arranged in a first direction, a patterning slit sheet arranged to face the deposition source nozzle and having patterning slits in a second direction that crosses the first direction, and a correction sheet arranged between the deposition source nozzle and the patterning slit sheet and configured to block at least a part of the deposition material sprayed from the deposition source.

An array substrate of organic light-emitting diodes and a method for fabricating the same are provided to narrow an edge frame of product device of organic light-emitting diodes, to shorten the package process time, and to improve the substrate utilization and the production efficiency. The array substrate of organic light-emitting diodes includes a plurality of display panels disposed in an array of rows and columns, wherein at least two adjacent display panels are connected through a frame adhesive, and there is no cutting headroom between at least one side of the at least two adjacent display panels.

One embodiment is a wide stripe semiconductor waveguide, which is cleaved at a Talbot length thereof, the wide stripe semiconductor waveguide having facets with mirror coatings. A system provides for selective pumping the wide stripe semiconductor waveguide to create and support a Talbot mode. In embodiments according to the present method and apparatus the gain is patterned so that a single unique pattern actually has the highest gain and hence it is the distribution that oscillates.

A tensioning device comprises an elongate member, preferably a band, and a frame having first and second sides. The band has a first end that is attachable to the first side of the frame and a second end that is releasably securable to the second side of the frame. A movable clamping member on the frame secures the second end of the band to the second side of the frame by cinching the second end of the band between an engagement surface on the band and a mating engagement surface on the second side of the frame. A restraining member is provided for restraining the clamping member to a first position spaced from the mating locking surface on the second side of the frame, when the restraining member is in a restraining orientation. The restraining member is movable out of the restraining orientation after the band is tensioned to a predetermined level using the second end. The band is tensioned to the aforementioned predetermined level and is secured to the second side of the frame, so that the band establishes a path of tension along its length that extends linearly between the two ends of the band.

Flash grip system is used to securely retain a USB flash drive or thumb drive and provide a comfortable, gripping surface. Further, the flash grip system may use an article-fastener such that the USB flash drive may be removably attached to a variety of articles (such as a keychain, a belt loop, a bag strap, etc). The holding surface may further include decorative indicia for decorating the USB flash drive.

The present invention provides an improvement in an article of jewelry of the type in which the ornamental portion of the article is secured or released selectively from the support portion of the article. The removable jewelry setting provides a simplified construction which is used readily by the wearer of jewelry to assemble a particular combination of ornament and support selected from a wide variety of such combinations made available by the improvement. The construction also enhances the ability to tailor a jewelry article to a particular style of dress without unduly multiplying the number of expensive ornaments required to provide a wide range of ornamented articles. The construction enables ease of interchange of the ornamental portion of an article of jewelry.

Self adjusting and/or locking buckle tongue assemblies for use with occupant restraint systems in vehicles are described herein. In one embodiment, a buckle tongue assembly includes a plate having a tongue portion configured to cooperatively engage a corresponding buckle assembly. The buckle tongue assembly of this embodiment can further include first and second web gripping portions carried by the plate. The second web gripping portion is configured to move relative to the first web gripping portion between a first position in which the web gripping portions are spaced apart to permit movement of a web therebetween, and a second position in which the web gripping portions are engaged or interlocked to clamp the web therebetween.

First and second plates have a space between them. Each plate has parallel top and bottom edges, parallel inner and outer edges, and interior and exterior surfaces. First and second fingering assemblies include fingers fabricated of a flexible material. Each finger includes a terminal projection extending into the space between the support plates. The fingers may move into and out of the space between the support plates. First and second tubes are provided. Each tube is coupled to the inner edge of an associated plate. Each tube has circumferential recesses with C-shaped clips positioned within the circumferential recesses. In this manner the tubes are secured together. Also in this manner rotation of the tubes and support plates is allowed.

A wire gripping assembly for securing an electrical box or light fixture to a support. The wire gripping assembly includes a wire gripping device having a body with open channels and a through bore, a clip member having legs for sliding engagement within the channels, a cable having an end connector thereon, and a thumbscrew for adjusting the clip member with respect to the body. The thumbscrew includes a head having an outer circumference with serrations to enable hand tightening and an end with a slot for engagement by a screwdriver or similar tool. The wire gripping assembly eases installation of an electrical device to an overhead support by enabling a two-step connection including initial hand tightening using the serrated outer surface of the thumbscrew and subsequent secure tightening by engaging the slot of the thumbscrew with a screwdriver or similar tool.

A respiratory mask assembly for delivering breathable gas to a patient includes a frame and at least one locking clip. The frame has a main body and a side frame member provided on each lateral side of the main body, at least one of the side frame members including a locking clip receiver assembly. The at least one locking clip has a main body providing a front portion adapted to be removably coupled with the at least one locking clip receiver assembly and a rear portion adapted to be removably coupled to a headgear assembly. The rear portion includes a cross bar that forms an opening through which a strap of the headgear assembly can pass and be removably coupled with the cross bar, and the front portion includes at least one resiliently flexible spring arm that is flexible within the plane of the main body.

The present disclosure relates to an apparatus for fastening a power semiconductor using an integral springy (elastic) clip, capable of fixing a power semiconductor, such as a diode and a MOSFET, using elasticity of a U-shaped clip by integrally molding the clip onto a housing of a plastic module. The apparatus includes an elastic (springy) clip integrally molded onto a lower surface of the housing and downwardly curved into a U-like shape in a bridge module in which a bridge of the power semiconductor protrudes through a through hole of the housing to be connected to a printed circuit board, whereby the power semiconductor is fixed by a force that the housing presses the power semiconductor.

An exemplary device that is useful for controlling vibrations of an elevator load bearing member includes a guide. A mass is moveable relative to the guide responsive to vibration of the load bearing member to introduce a force to counter the vibration.

A clamp assembly includes a body member having a cable groove formed therein to receive a cable. A keeper is connected to the body member and has a lower surface adapted to engage the cable received in the cable groove. A biasing member is disposed between the keeper and the body member.

A casket shell assembly and method provide for covering an economical or plain casket with a reusable decorative shell. The assembly includes a casket and a shell. The shell has a perimeter wall, an open top, and an open bottom. The shell receives the casket through the open top. A lip coupled to the perimeter wall of the shell supports the casket when the casket is inserted into the shell. A lid is coupled to the perimeter wall selectively covering the open top of the shell when the lid is in a closed position. A plurality of straps is positioned in the shell extending between the shell and the casket. Each of the straps has opposite free ends extendable through the open top of the shell for facilitating lifting of the casket from the shell.

A casket system includes a casket container and a movable platform. The casket container has a bottom, and includes a plurality of rollers supported by said bottom. The movable platform is disposed within the casket container. The movable platform including slots extending through the platform and aligned horizontally with the plurality of rollers, the movable platform having a raised position and a lowered position, wherein at least a portion of a first number of the plurality of rollers extend through the slots and stand proud the movable platform in the lowered position, and a portion of fewer than the first number of the plurality of rulers stand proud the movable platform in the raised position.

An improved cemetery experience whereby the cemetery and accompanying facilities may celebrate and demonstrate the passion and hobbies of the deceased individual. The contemplated themed cemetery may be a stand-alone cemetery that celebrates a common passion of a plurality of individuals, yet still maintains the traditional burial and memorialization process. The themed cemetery may take a specific event, or commonly understood and loved location and memorialize that location in the theme of a cemetery where those with that common interest and enjoyment of the commonly understood location may desire to be buried. The cemetery would closely resemble both visually, and physically a replica of the theme being celebrated and may provide space for the deceased while still providing adequate income and revenue in the way of advertising for the operator.

A memorial product is presently disclosed that includes a glass structure having a first helix of cremation remains and a second helix of a second material, wherein the helix of the cremation remains and the helix of the second material are intertwined to form a double helix in the glass structure. In some embodiments, the second material is additional cremation remains or a colored material selected to correspond to the deceased represented by the cremation remains. Also disclosed is a method of manufacturing a memorial product including forming a first portion of molten glass into a substantially cylindrical shape having an exterior surface, applying cremation remains on a first portion of the exterior surface, applying a second material on a second portion of the exterior surface, and gathering a second portion of molten glass over the first portion of molten glass to encase the cremation remains and the second material.

An apparatus including a mounting platform, wherein the mounting platform includes a substantially planar mounting surface; a clamping mechanism on the mounting surface; a memorial item retained by the clamping mechanism; and an arrangement of handles on a side of the mounting platform, wherein the side is substantially normal to the plane of the mounting surface.

An apparatus for preserving human or animal remains comprising a burial chamber further comprising a hermetically sealed interior containing gas or water vapor, wherein the gas creates a gas pressure within the hermetically sealed interior, and a vacuum pump, wherein the vacuum pump is in functional communication with the hermetically sealed interior, wherein the vacuum pump operates to evacuate the gas or the water vapor from the hermetically sealed interior, and wherein the vacuum pump is intermittently activated to reduce the gas pressure within the hermetically sealed interior for a desiccating duration.

A container system for storing remains is provided, including a rigid storage vessel defining an inner chamber for receiving remains. The system includes at least one display frame member outside the rigid storage vessel for displaying information, such as a picture. A cap is provided proximate the storage vessel, wherein the cap defines at least one storage area for receiving an object.

A decorative memorial serves to display a sealed, visible portion of cremation ashes.

An aerial disposal and dispersal of cremated remains device is presented. It is used to spread the remains of loved ones over a desired area. The device comprises a canister and a mortar, the canister being cylindrical in shape having cardboard walls, the canister further containing an igniter and burster charge in an inner cardboard tube, such inner tube being fitted with an upper cap, the mortar being cylindrical in shape with steel walls, the mortar further comprising a lifting charge which sits below an obturator disc, the obturator disc having a hole in the center, the canister fitting inside the mortar such that the canister's igniter sits atop the hole in the obturator disc. At least one device is fitted to a horizontal member to launch remains from any location.

A corrugated fiberboard box assembly including a first portion including a bottom section having a pair of opposite long edges and a pair of opposite short edges with all edges being bounded by a plurality of creases, a pair of opposing side panels running along and connected to the pair of opposite long edges by two of the plurality of creases, and a pair of opposing end panels running along and connected to the pair of opposite short edges by another two of the plurality creases. The first portion being foldable to form a rectangular box with the bottom section on the bottom and the side panels and end panels both extending substantially perpendicularly upwardly away from the bottom to form side walls of the box. The box further includes a separate inner liner configured to fit within an inside of the side walls and a top configured to fit over the tops of the side walls.