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Data processing method and apparatus for prefetching

A data processing device includes processing circuitry 20 for executing a first memory access instruction to a first address of a memory device 40 and a second memory access instruction to a second address of the memory device 40, the first address being different from the second address. The data processing device also includes prefetching circuitry 30 for prefetching data from the memory device 40 based on a stride length 70 and instruction analysis circuitry 50 for determining a difference between the first address and the second address. Stride refining circuitry 60 is also provided to refine the stride length based on factors of the stride length and factors of the difference calculated by the instruction analysis circuitry 50.




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Shared load-store unit to monitor network activity and external memory transaction status for thread switching

An array of a plurality of processing elements (PEs) are in a data packet-switched network interconnecting the PEs and memory to enable any of the PEs to access the memory. The network connects the PEs and their local memories to a common controller. The common controller may include a shared load/store (SLS) unit and an array control unit. A shared read may be addressed to an external device via the common controller. The SLS unit can continue activity as if a normal shared read operation has taken place, except that the transactions that have been sent externally may take more cycles to complete than the local shared reads. Hence, a number of transaction-enabled flags may not have been deactivated even though there is no more bus activity. The SLS unit can use this state to indicate to the array control unit that a thread switch may now take place.




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System, method and computer program product for recursively executing a process control operation to use an ordered list of tags to initiate corresponding functional operations

In accordance with embodiments, there are provided mechanisms and methods for controlling a process using a process map. These mechanisms and methods for controlling a process using a process map can enable process operations to execute in order without necessarily having knowledge of one another. The ability to provide the process map can avoid a requirement that the operations themselves be programmed to follow a particular sequence, as can further improve the ease by which the sequence of operations may be changed.




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Dynamic energy savings for digital signal processor modules using plural energy savings states

In an example embodiment, there is described herein an apparatus comprising an interface for communicating with a plurality of digital signal processors and logic operable to send and receive data via the interface. The logic is configured to determine a first set of digital signal processors to be maintained in a ready state, a second set of digital signal processors to be maintained in a first energy saving state, and a third set of digital signal processors to be maintained in a second energy saving state.




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Conducting verification in event processing applications using formal methods

A method of applying formal verification methodologies to event processing applications is provided herein. The method includes the following stages: representing an event processing application as an event processing network, being a graph with event processing agents as nodes; generating a finite state machine based on the event processing network, wherein the finite state machine is an over-approximation of the event processing application; expressing stateful rules and policies that are associated with the event processing application using temporal logic, to yield a temporal representation of the event processing application; combining the temporal representation and the finite state machine into a model; generating a statement associated with a user-selected verification-related property of the event processing application, wherein the statement is generated using the temporal representation; and applying the statement to the model, to yield an indication for: (i) a correctness of the statement or (ii) a counter example, respectively.




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Unified and extensible asynchronous and synchronous cancelation

A cancelation registry provides a cancelation interface whose implementation registers cancelable items such as synchronous operations, asynchronous operations, type instances, and transactions. Items may be implicitly or explicitly registered with the cancelation registry. A consistent cancelation interface unifies cancelation management for heterogeneous items, and allows cancelation of a group of items with a single invocation of a cancel-registered-items procedure.




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Custom code lifecycle management

A method is provided to manage program code that runs in a computer system comprising: producing a management information structure that identifies a managed system within the computer system; producing a master object definition information structure that provides a mapping between master objects and corresponding managed code objects that run in the computer system; and requesting extraction of information from the managed system identified by the master information structure that relates to managed code objects that the object definition information structure maps to master objects.




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Identifying differences between source codes of different versions of a software when each source code is organized using incorporated files

An aspect of the present invention identifies differences between source codes (e.g. of different versions of a software), when each source code is organized using incorporated files. In one embodiment, in response to receiving identifiers of a first and second source codes (each source code being organized as a corresponding set of code files), listings of the instructions in the first and second source codes are constructed. Each listing is constructed, for example, by replacing each incorporate statement in the source code with instructions stored in a corresponding one of code files. The differences between the first and second source codes are then found by comparing the constructed listings of instructions.




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System and method for generating software unit tests simultaneously with API documentation

A system and method may generate unit tests for source code concurrently with API documentation. The system may receive a source code file including several comments sections. Each comments section may include a description of a source code unit such as a class, method, member variable, etc. The description may also correspond to input and output parameters the source code unit. The system and method may parsing the source code file to determine a source code function type corresponding to the unit description and copy the unit description to a unit test stub corresponding to the function type. A developer or another module may then complete the unit test stub to transform each stub into a complete unit test corresponding to the source code unit. Additionally, the system and method may execute the unit test and generate a test result indication for each unit test.




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Fault localization using condition modeling and return value modeling

Disclosed is a novel computer implemented system, on demand service, computer program product and a method that leverages combined concrete and symbolic execution and several fault-localization techniques to automatically detects failures and localizes faults in PHP Hypertext Preprocessor (“PHP”) Web applications.




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Information editing apparatus

An information editing device is provided with an object storage portion 11 in which a character string object or image object is stored, a placement information storage portion 12 that stores placement area designation information that sets two or more placement areas that do not overlap each other for respectively placing the objects, and that correspond to the objects, an object output portion 13 that outputs, into placement areas that are set based on the placement area designation information, each of the objects corresponding to the respective placement areas, an input receiving portion 14 that receives a deletion instruction or a modification instruction for at least one of the objects output by the object output portion 13, and a placement modification portion 15 that, according to the deletion instruction or modification instruction, modifies the placement area of the object such that the placement area is placed without overlapping.




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Simultaneously targeting multiple homogeneous and heterogeneous runtime environments

A single software project in an integrated development environment (IDE) may be built for multiple target environments in a single build episode. Multiple different output artifacts may be generated by the build process for each of the target environments. The output artifacts are then deployed to the target environments, which may be homogeneous or heterogeneous environments. The same source project may be used to generate multiple output artifacts for the same target environment.




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Language translation using preprocessor macros

A method is provided for providing consistent logical code across specific programming languages. The method incorporates preprocessor macros in a source computer program code to generate a program control flow. The preprocessor macros can be used to describe program control flow in the source programming language for execution in the source computer program code. The preprocessor macros can also be used to generate control flow objects representing the control flow, which converts the source computer program code into a general language representation. The general language representation when executed is used to output computer programming code in specific programming languages representing the same logical code as that of the source computer program code.




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Optimization hints for a business process flow

In one embodiment, an optimization hint may be included in a business process flow. An executable process may be generated from the business process flow where the optimization hint is included in the executable process. While executing the executable process, the runtime engine encounters an optimization hint and determines an optimization to perform. The optimization hint may be related to an aspect of a business process being orchestrated by the business process flow. The optimization is then performed while executing the executable process. For example, the runtime engine may start pre-processing the branch while the condition is being evaluated. If the condition evaluates such that the pre-processed branch should be executed, then the runtime engine has already started processing of that branch. The processing is thus optimized in that the runtime engine is not sitting idle while waiting for the condition to be evaluated.




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Adjustment of threads for execution based on over-utilization of a domain in a multi-processor system by destroying parallizable group of threads in sub-domains

Embodiments provide various techniques for dynamic adjustment of a number of threads for execution in any domain based on domain utilizations. In a multiprocessor system, the utilization for each domain is monitored. If a utilization of any of these domains changes, then the number of threads for each of the domains determined for execution may also be adjusted to adapt to the change.




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Methods and systems to identify and reproduce concurrency violations in multi-threaded programs using expressions

Methods and systems to identify and reproduce concurrency bugs in multi-threaded programs are disclosed. An example method disclosed herein includes defining a data type. The data type includes a first predicate associated with a first thread of a multi-threaded program that is associated with a first condition, a second predicate that is associated with a second thread of the multi-threaded program, the second predicate being associated with a second condition, and an expression that defines a relationship between the first predicate and the second predicate. The relationship, when satisfied, causes the concurrency bug to be detected. A concurrency bug detector conforming to the data type is used to detect the concurrency bug in the multi-threaded program.




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Firmware update method and apparatus of set-top box for digital broadcast system

A firmware update method and apparatus of a set-top box for a digital broadcast system is provided. A firmware update method of a set-top box for a digital broadcast system includes determining whether a newly received Code Version Table (CVT) following a public CVT which has been previously received and stored is the public CVT or a filtering CVT; and updating, when the newly received CVG is the filtering CVT, the firmware of the set-top box with a filtering firmware indicated by the filtering CVT.




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Malodor counteracting compositions and method for their use

The present invention relates to the field of perfumery and more particularly to the field of malodor counteractancy. In particular, it relates to a method for application of malodor counteracting (MOC) compositions capable of neutralizing in an efficient manner, through chemical reactions, malodors of a large variety of origins and which can be encountered in the air, on textiles, bathroom or kitchen surfaces, and the like. The composition may be applied as is or in the form of a perfuming composition or in a consumer product or article containing the compound or perfume composition.




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Microcapsules and uses thereof

The present invention relates to a process for producing perfume-containing microcapsules having both an aqueous inner phase and an oily inner phase, which can be used in home or personal care products, as well as to the process for producing these microcapsules and the consumer products containing them.




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Microcapsules, their use and processes for their manufacture

A microcapsule comprising A) a core containing a hydrophobic liquid or wax, B) a polymeric shell comprising a) a polymer formed from a monomer mixture containing: i) 1 to 95% by weight of a hydrophobic mono functional ethylenically unsaturated monomer, ii) 5 to 99% by weight of a polyfunctional ethylenically unsaturated monomer, and iii) 0 to 60% by weight of other mono functional monomer, and b) a further hydrophobic polymer which is insoluble in the hydrophobic liquid or wax. The invention includes a process for the manufacture of particles and the use of particles in articles, such as fabrics, and coating compositions, especially for textiles.




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Perfuming compositions and uses thereof

A perfuming composition capable of prolonging the release of a perfuming component into the surrounding environment when applied on a body surface. The composition includes isocetyl alcohol as a fragrance evaporation modulator in the presence of high amounts of ethanol. Also, consumer articles containing such compositions and methods for the perfuming of a body surface and for increasing the long-lastingness of a perfuming component using these compositions.




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Use of alkamides for masking an unpleasant flavor

An individual alkamide and/or a mixture having two or more different alkamides, is disclosed for changing, masking or reducing the unpleasant flavor impression of an unpleasant-tasting substance or mixture of substances. The alkamide can be trans-pellitorine; cis-pellitorine; 2Z,4Z- or 2Z,4E-decadienoic acid-N-isobutylamide; 2E,4E-decadienoic acid-N-([2S]-2-methylbutyl)amide; 2E,4E-decadienoic acid-N-([2R]-2-methylbutylamide); 2E,4Z-decadienoic acid-N-(2-methylbutyl)amide; achilleamide; sarmentine; 2E- or 3E-decenoic acid-N-isobutylamide; 3E-nonenoic acid-N-isobutylamide; spilanthol; homospilanthol; 2E,6Z,8E-decatrienoic acid-N-([2R]-2-methylbutyl)amide; 2E- or 2Z-decen-4-oic acid-N-isobutylamide; α-sanshool; α-hydroxysanshool; γ-hydroxysanshool; γ-hydroxysanshool; γ-hydroxyisosanshool; γ-dehydrosanshool; γ-sanshool; bungeanool; isobungeanool; dihydrobungeanool; or tetrahydrobungeanool, or combinations thereof.




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3-methyl-6-cyclohexadecen-1-one and its use in perfume compositions

The present invention is directed to a novel fragrance compound, 3-methyl-cyclohexadec-6-enone.




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4-alkyl substituted pyridines as odiferous substances

The present invention primarily concerns certain 4-alkyl pyridines of the following formula (I), wherein R is C8-C12 alkyl, odiferous substance mixtures and aromatic substance mixtures containing these 4-alkyl pyridines, the respective uses thereof as an odiferous or aromatic substance (mixture) and corresponding perfumed products.




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Pyrimidine derivatives and their use in perfume compositions

The present invention relates to novel pyrimidine derivatives and their use in perfume compositions. The novel pyrimidine derivatives of the present invention are represented by the following formula: wherein m and n are integers of 0 or 1, with the proviso that when m is 0, n is 1 and when m is 1, n is 0; andwherein the dashed circle represents either single or double bonds.




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Using a dilute acid stream as an extractive agent

Recovery of ethanol from a crude ethanol product obtained from the hydrogenation of acetic acid using an extractive distillation column. A diluted acid stream, comprising less than 30 wt. % acetic acid, is used as the extractive agent and is fed at a point above the crude feed stream. The column yields a residue that comprises ethanol, acetic acid, and water. The diluted acid stream may be separated from the residue and returned to the extractive distillation column.




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Process for making ethanol from acetic acid using acidic catalysts

A process for selective formation of ethanol from acetic acid by hydrogenating acetic acid in the presence of a catalyst comprises a first metal on an acidic support. The acidic support may comprise an acidic support material or may comprise an support having an acidic support modifier. The catalyst may be used alone to produced ethanol via hydrogenation or in combination with another catalyst. In addition, the crude ethanol product is separated to obtain ethanol.




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Esterification process using extractive separation to produce feed for hydrogenolysis

Disclosed herein are processes for alcohol production by reducing an esterification product, such as ethyl acetate. The processes comprise esterifying acetic acid and an alcohol such as ethanol to produce an esterification product. The esterification product may be recovered using an extractive separation. The esterification product is reduced with hydrogen in the presence of a catalyst to obtain a crude reaction mixture comprising the alcohol, in particular ethanol, which may be separated from the crude reaction mixture.




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Protected aldehydes for use as intermediates in chemical syntheses, and processes for their preparation

A para-methoxy protected benzaldehyde useful in preparation of treprostinil, and of formula: (Formula (1)) is prepared by subjecting to Claisen re-arrangement a substituted benzaldehyde of formula (1a): (Formula (Ia)) to form the m-hydroxy-substituted benzaldehyde of formula (1b): (Formula (Ib)) and then reacting compound (1b) with a p-methoxybenzyl (PMB) compound to form a PMB-substituted benzaldehyde of formula (1).




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Apparatus for coproducting ISO type reaction products and alcohols from olefins, and method for coproducting them using the apparatus

The present invention relates to an apparatus for coproducting iso-type reaction product and alcohol from olefin, and a method for coproducting using the apparatus, in which the hydroformylation reactor provides a sufficient reaction area due to the broad contact surface area between the olefin and the synthesis gases that are the raw materials by a distributor plate installed in the reactor, and the raw materials can be sufficiently mixed with the reaction mixture due to the circulation of the reaction mixture so that the efficiency of the production of the aldehyde is excellent; and also the hydrogenation reactor suppresses the side reaction so that the efficiency for producing aldehyde and alcohol are all increased, and also iso-type reaction product and alcohol can be efficiently co-produced.




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Energy efficient method and apparatus for the extraction of lower alcohols from dilute aqueous solution

The present invention relates to the energy efficient and selective extraction of dilute concentrations of C2-C6 alcohols from an aqueous solution using liquid phase dimethyl ether.




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Optical resolution methods for bicyclic compounds using asymmetric catalysts

An optically active bicyclic compound is efficiently produced by optical resolution using an optically active amine.




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Process for the in situ production of polyether polyols based on renewable materials and their use in the production of flexible polyurethane foams

A polyether polyol based on renewable materials is obtained by the in situ production of a polyether from a hydroxyl group-containing vegetable oil, at least one alkylene oxide and a low molecular weight polyol having at least 2 hydroxyl groups. The polyol is produced by introducing the hydroxyl group-containing vegetable oil, a catalyst and an alkylene oxide to a reactor and initiating the alkoxylation reaction. After the alkoxylation reaction has begun but before the reaction has been 20% completed, the low molecular weight polyol having at least 2 hydroxyl groups is continuously introduced into the reactor. After the in situ made polyether polyol product having the desired molecular weight has been formed, the in situ made polyether polyol is removed from the reactor. These polyether polyols are particularly suitable for the production of flexible polyurethane foams.




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Method for operating an internal combustion engine

A method for operating an internal combustion engine in which a speed-based feature of the internal combustion engine, which is correlated with an indicated mean effective pressure of the fuel, is determined during the warm-up of the internal combustion engine and an ideal fuel quantity, which is to be injected into at least one combustion chamber of the internal combustion engine during the warm-up, is ascertained therefrom.




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Method, apparatus and computer program for determining the location of a user in an area

Apparatus for orientating a user in a space wherein the space comprises a plurality of zones of which only certain zones constitute functional zones wherein each functional zone includes a first type device containing information relating to the position of the zone in the space and wherein the first type device is reactive to the presence of a second type device associated with the user to provide the user with the information to determine the orientation of the user in the space. A method of orientating the user within the space and guiding the user toward one or more features in the space is also disclosed.




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Method for governing a speed of an autonomous vehicle

A method of adjusting a speed of a mobile machine is provided. Image data of a location is collected where currently generated sensor data and previously generated sensor data indicate a discontinuity in sensor data. The image data is analyzed to determine if a non-motion blur score for the image data is above a threshold value. Then, a speed of the mobile machine is adjusted based on a determination that the non-motion blur score is above the threshold value.




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Apparatus for estimating travel path of a vehicle

An apparatus for estimating a travel path of a vehicle is mounted on the vehicle; and includes: an object detection device that detects an object lying ahead of the vehicle; a stationary object detection device that determines whether a detected object is a stationary object; a device that calculates an approximate straight line indicating a path of the stationary object from the temporal positional data for the stationary object projected on two-dimensional coordinates using a vehicle position as a starting point; a device that calculates a orthogonal line which passes through a midpoint in the temporal positional data for the stationary object and goes straight with respect to the approximate straight line on the two-dimensional coordinates; and a device that calculates a vehicle turning radius from an intersection point where the orthogonal line intersects with a x axis.




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Navigation system and navigation method of route planning using variations of mechanical energy

A navigation system having a central device which uses a link shape compression unit to compress information of altitude changes of a road link obtained from a three-dimensional road map, and calculates a geometry parameter based on variation of energy of a vehicle travelling on the road link. An on-board terminal device estimates the vehicle's average travelling pattern by using a travel-pattern-estimation unit based on the geometry parameter calculated by the central device, a link-travelling time estimated from statistically-stored traffic information, and a link length. The on-board terminal device further calculates fuel consumption of the vehicle travelling on each road link based on the estimated travelling pattern and parameters of the vehicle by using a fuel-consumption calculation unit, and then, searches a fuel-efficient route by using the fuel consumption as a link cost. The on-board terminal device has a vehicle-type selector for selecting a type of the vehicle.




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Method for car navigating using traffic signal data

There is a provided a method for car navigating using traffic signal data. The method for car navigating is characterized of providing an optimized route for the earliest arrival to destinations by using signal system data of one or more traffic signals existing on a certain route.




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Method and apparatus for mapping buildings

An apparatus and method for determining an Absolute Location of an indoor stationary object, the method comprising: receiving a distance between an indoor stationary object and one or more predetermined spots; determining a location of stationary object relative to one of the predetermined spots; receiving an Absolute Location of one of the predetermined spots; determining an Absolute Location of the stationary object; and storing the Absolute Location of the stationary object with description information of the stationary object.




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Vehicle control apparatus

Disclosed is a vehicle control apparatus which can prevent the deterioration of drivability. The ECU can set a control accelerator opening degree to be converted when a control permission condition is established. The control accelerator opening degree is equal to or larger than an accelerator lower limit which is larger than an idle determination value for determining an automatic stopping of an engine by an eco-run. The control accelerator opening degree thus set can prevent the drivability from being deteriorated without the automatic stopping of the engine being caused even if the accelerator opening degree is converted to reduce the torque of the engine with the establishment of the control permission condition.




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Vehicle notification sound emitting apparatus

A vehicle notification sound emitting apparatus is basically provided with a first sound emitting device, a second sound emitting device and a notification sound control device. The first sound emitting device emits a first intermittent notification sound inside a cabin interior of a vehicle. The second sound emitting device emits a second intermittent notification sound outside of the cabin interior of the vehicle. The notification sound control device operates the first and second sound emitting devices to separately emit the first and second intermittent notification sounds in at least a partially overlapping pattern in response to occurrence of a vehicle condition to convey a same type of vehicle information to both inside and outside of the cabin interior of the vehicle. The notification sound control device includes a cabin interior-exterior notification sound synchronizing section that is configured to synchronize the first and second intermittent notification sounds.




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Method and apparatus for alignment optimization with respect to plurality of layers

A method of patterning a plurality of layers of a work piece in a series of writing cycles in one or a plurality of write machines, the workpiece being deviced to have a number of N layers and layers of the workpiece having one or a plurality of boundary condition(s) for pattern position, the method comprising the steps of: determining the boundary conditions of layers 1 to N, calculating deviations due to the boundary conditions and calculating a compensation for the deviation of the first transformation added with the assigned part of the deviation due to the boundary conditions.




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Verification module apparatus for debugging software and timing of an embedded processor design that exceeds the capacity of a single FPGA

A plurality of Field Programmable Gate Arrays (FPGA), high performance transceivers, and memory devices provide a verification module for timing and state debugging of electronic circuit designs. Signal value compression circuits and gigabit transceivers embedded in each FPGA increase the fanout of each FPGA. Ethernet communication ports enable remote software debugging of processor instructions.




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Method and apparatus for creating and managing waiver descriptions for design verification

Methods are provided to facilitate automated creation and management of design rule checking or DRC waiver descriptions. Embodiments include receiving a plurality of first checksums corresponding to respective first geometric element violations waived in association with a block of an integrated circuit design, the first checksums being based on a first version of at least one design verification rule and/or of the block, receiving a second checksum corresponding to a second geometric element violation associated with the block, the second checksum being based on a second version of the design verification rule and/or of the block, determining whether the second checksum corresponds to at least one of the first checksums, and, if the second checksum does not correspond to at least one first checksum, generating a waiver request for the second geometric element error.




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Semiconductor device design method and design apparatus

A relationship between distance from a back bias control section which outputs a control signal for controlling a back bias of a transistor and an amount of noise in the control signal outputted from the back bias control section is found. An increase of jitter corresponding to the amount of the noise in a clock transmitted on a clock path connected to a circuit section (IP macro) is found on the basis of the relationship between the distance from the back bias control section and the amount of the noise. The circuit section and the clock path are placed on the basis of the increase of the jitter and an allowable jitter value for the circuit section.




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System and method for integrated transformer synthesis and optimization using constrained optimization problem

A method for designing a transformer in an integrated circuit includes receiving one or more desired characteristics of the transformer from user input and iteratively determining a design solution for the transformer through one or more simulations and modifications using a rule-set. The method combines the one or more desired characteristics with other preset characteristics of the transformer or the integrated circuit. A first model of the transformer is defined with typical load impedances and simulated having the combined characteristics to determine performance. Results of the simulation are processed to calculate performance with the load impedances specified by the user. The results are further processed to obtain a mathematical model that includes tuning capacitors. The first and subsequent models are modified by drawing on a rule-set of expert knowledge relating to general dependency of at least one design criterion, such as a physical, geometrical or performance characteristic, with another design criterion.




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Method and system for critical dimension uniformity using charged particle beam lithography

A method for mask data preparation or mask process correction is disclosed in which a set of charged particle beam shots is determined which is capable of forming a pattern on a surface, wherein critical dimension uniformity (CDU) of the pattern is optimized. In some embodiments the CDU is optimized by varying at least two factors. In other embodiments, model-based techniques are used. In yet other embodiments, the surface is a reticle to be used in an optical lithographic process to form a pattern on a wafer, and CDU on the wafer is optimized.




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Network synthesis design of microwave acoustic wave filters

Methods for the design of microwave filters comprises comprising preferably the steps of inputting a first set of filter requirements, inputting a selection of circuit element types, inputting a selection of lossless circuit response variables, calculating normalized circuit element values based on the input parameters, and generate a first circuit, insert parasitic effects to the normalized circuit element values of the first circuit, and output at least the first circuit including the post-parasitic effect circuit values. Additional optional steps include: requirements to a normalized design space, performing an equivalent circuit transformation, unmapping the circuit to a real design space, performing a survey, and element removal optimization. Computer implement software, systems, and microwave filters designed in accordance with the method are included.




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Method and apparatus for generating gate-level activity data for use in clock gating efficiency analysis

A mechanism for generating gate-level activity data for use in clock gating efficiency analysis of an integrated circuit (IC) design is provided. Generating the gate-level activity data includes generating a signal behaviour description for inter-register signals, generating a gate-level netlist for the IC design, generating gate-level stimuli based at least partly on the generated signal behaviour description, and performing gate-level simulation using the generated gate-level stimuli to generate gate-level activity data for the IC design. In one embodiment, generating the signal behaviour description includes performing Register Transfer Level (RTL) simulation of the IC design, and generating the gate-level netlist includes performing RTL synthesis. The RTL simulation and RTL synthesis are performed on RTL data for the IC design.