A USB interface to provide power delivery negotiated through a dedicated transmission channel includes a transmitter circuit including a digital-to-analog converter having an output coupled with an input of a transmission filter, a receiver circuit including an analog-to-digital converter having an input coupled with an output of a receiving filter, and a switching circuit configured in an operating mode of the USB interface to connect an output of the transmission filter and an input of the receiving filter to a connection node of the dedicated transmission channel.

A capability determining method for a terminal device, a host, and a system is provided. The capability determining method includes acquiring, by the host, a capability supported by the terminal device. The method also includes determining, by the host according to the capability supported by the terminal device and a capability supported by the host, a capability supported by both the terminal device and the host, and using the capability supported by both the terminal device and the host as an overlapping capability, where the overlapping capability is used by the terminal device to perform capability configuration. The method also includes sending the overlapping capability to the terminal device.

Provided are a memory device and a memory bank comprised of a local data bus, a segmented global data bus coupled to the local data bus, and a section select switch that is configurable to direct a signal from the local data bus to either end of the segmented global data bus. Provided also is a computational device comprising a processor and the memory device and optionally a display. Provided also is a method in which a signal is received from a local data bus, and a section select switch is configured to direct the signal from the local data bus to either end of a segmented global data bus.

An interconnect switch is provided including switching logic executable to facilitate a Peripheral Component Interconnect Express (PCIe)-based interconnect, and further including a control host embedded in the switch to provide one or more enhanced routing capabilities. The control host includes a processor device, memory, and software executable by the processor device to process traffic received at one or more ports of the switch to redirect at least a portion of the traffic to provide the one or more enhanced routing capabilities.

The present application relates to a serial data communications switching device and a method of operating the serial data communications switching device. The serial data communications switching device comprises one host port for connecting to a host device; a plurality of client ports each for connecting to one of a plurality of client devices; an arbiter configured to arbitrate the permission to send a message sequence between the plurality of the client devices according to an arbitration scheme; and a TX flow analyzer adapted to detect a client transmission received at one of the client port from a current client device currently having granted the permission and to instruct the arbiter to maintain the granted permission for the current client device for the ongoing client transmission.

A method of switching an apparatus state of a first apparatus having a first universal serial bus (USB) interface connected via a connecting wire with a second USB interface of a second apparatus is provided. The method may include receiving a state switching instruction, setting a level of a configuration channel (CC) in a USB interface circuit corresponding to the first USB interface from a first high level to a first low level via a logic controller of the first apparatus when the state switching instruction instructs the first apparatus to perform a master-to-slave switch, and setting the level of the CC in the USB interface circuit corresponding to the first USB interface from the first low level to the first high level via the logic controller of the first apparatus when the state switching instruction instructs the first apparatus to perform a slave-to-master switch.

Methods, systems, and apparatus, including computer programs encoded on computer storage media, for storing an address in a memory of a switch. One of the systems includes a switch that receives packets from and delivers packets to devices connected to a bus without any components on the bus between the switch and each of the devices, a memory integrated into the switch to store a mapping of virtual addresses to physical addresses, and a storage medium integrated into the switch storing instructions executable by the switch to cause the switch to perform operations including receiving a response to an address translation request for a device connected to the switch by the bus, the response including a mapping of a virtual address to a physical address, and storing, in the memory, the mapping of the virtual address to the physical address in response to receiving the response.

A communication system with train bus architecture is described. The communication system with the train bus architecture comprises a coupling device for transmitting a first instruction packet string having instruction packets via first path; the controlled module for receiving the first instruction packet string via first path, wherein the controlled module selects one instruction packet from the instruction packets, replaces the selected instruction packet by first response packet for forming second instruction packet string, and processes the selected instruction packet to generate a second response packet; and a terminal device for receiving the second instruction packet string via the first path, and for transmitting the second instruction packet string back to the coupling device via the at least one controlled module along a second path from the terminal device to the coupling device wherein the first path is connected to the second path to form train bus architecture.

An apparatus includes a substrate, a classical computing processor formed on the substrate, a quantum computing processor formed on the substrate, and one or more coupling components between the classical computing processor and the quantum computing processor, the one or more coupling components being formed on the substrate and being configured to allow data exchange between the classical computing processor and the quantum computing processor.

A physical layer network interface module (PHY-NIM) adaptation system provides a PHY-NIM device and an attachable media access control (MAC) device. The PHY-NIM device interconnects with the attachable MAC device and the attachable MAC device interconnects to a network appliance to provide at least one of network switch capabilities and MAC device capabilities for use by the network appliance. The PHY-NIM device interconnects directly to the network appliance where the network appliance has at least one of an internal network switch and an internal MAC device in a southbridge input/output (I/O) interface chip of the network appliance.

Examples of adapters for transmitting signals are disclosed. In one example implementation according to aspects of the present disclosure, an adapter may include a first connector communicatively couplable to PCIe port of a computing system via a first plurality of pins and a second connecter communicatively couplable to an electronic device via a second plurality of pins. The first plurality of pins is communicatively coupled to the second plurality of pins. Additionally, signals of a first type are transmittable between the computing system and the electronic device via a first subset of the first and the second pluralities of pins and signals of a second type are transmittable between the computing system and the electronic device via a second subset of the first and the second pluralities of pins. The second subset of the first plurality of pins and the second plurality of pins conforms to the SFF 8639 standard.

A communication system with serial ports for automatically identifying device types and communication protocols and method thereof are described. The communication system and method are capable of automatically identifying the device types and communication protocols of interface devices with different serial device numbers which are disposed in the serial port architecture. Furthermore, the drivers are capable of performing a serial communication based on the serial port architecture for matching the device types and communication protocols correspondingly, thereby reducing the development and manufacturing costs of communication system. Moreover, the user of an application program module only needs to provide the device numbers and data control information without the cooperation of hardware circuits and manufacturing technique of the interface devices to complete the automatic control and monitoring tasks of the interface devices to increase the utilization convenience.

An apparatus is provided that includes a processor, a memory controller coupled to the processor to provide access to a system memory, and an interface controller to communicate with an endpoint device. The interface controller is coupled to the processor and configured to access a register of the endpoint device, the register to be mapped into a memory space of the system, the register to store a service latency tolerance value of the endpoint device. The endpoint device has a service latency tolerance value for a first state and a service latency tolerance value for a second state. The service latency tolerance value for the first state is greater than the service latency tolerance value for the second state.

A device includes a transmitter coupled to a node, where the node is to couple to a wired link. The transmitter has a plurality of modes of operation including a calibration mode in which a range of communication data rates over the wired link is determined in accordance with a voltage margin corresponding to the wired link at a predetermined error rate. The range of communication data rates includes a maximum data rate, which can be a non-integer multiple of an initial data rate.

A technique allows for protecting a PCI device controller from a PCI BDF masquerade attack from Ring-0 and Ring-3 malware. The technique may use Virtualization technologies to create guest virtual machines that can use a hypervisor to allocate ACPI information from ACPI tables to a secure VM and using extended page tables (EPT) and VT-d policies to protect the MMIO memory range during illegal runtime events.

Provided is memory device and a memory bank, comprising a global data bus, and a local data bus split into two parts, wherein the local data bus is configurable to direct signals to the global data bus. Provided also is a method in which signals are received in a local data bus that is split into two parts, and the signals are directed from the local data bus to the global data bus. Provided also is a computational device comprised of a processor and the memory device.

In one aspect, a first device includes a housing, at least one system component housed by the housing, a connector coupled to the housing that engages with a second device for exchange, between the first device and the second device, of at least one of data and power, and a first magnet coupled to the housing. The first magnet is coupled to the housing so that a first pole of the first magnet faces away from the first device to repel a first pole of a second magnet coupled to the second device when the first device is juxtaposed next to the second device in a first orientation relative to the second device.

A method of receiving a plug at a receptacle is disclosed. The method may include receiving a plug at a receptacle, the receptacle including contacts disposed with a rotational symmetry about a center point of the receptacle. The method may also include determining, via detection circuitry, any orientation of the plug inserted into the receptacle. The method may also include changing, via selection control circuitry, a connection path coupled to the contacts based on the orientation of the plug.

A storage system includes a first and second control modules (CMs) connected to a client and a storage module over a communication fabric. In response to a data fragment written to the storage module, the first CM is to create a table of contents (TOC) entry in a TOC page maintained in a first storage partition of the storage module, update its FTL map, determine whether the TOC page contains a predetermined number of TOC entries, and in response to determining that the TOC page contains the predetermined number of TOC entries, send a control signal to the second CM via an inter-processor link. In response to the control signal received from the first CM via the inter-processor link, the second CM is to copy the TOC page from the first storage partition to a memory associated with the second CM to allow the second CM to update its FTL map.

A requester sends, to a responding component, a request to cause the responding component to perform a computation. The requester sends, to the responding component, a delayed read indication, where the delayed read indication indicates that a result of the computation is not to be returned to the requester from the responding component until a data value at a target address of the delayed read indication has changed. The requester receives, from the responding component, an acknowledgment of the delayed read indication, and after receiving the acknowledgment, receives a response to the request without the requester sending another request to the responding component.

A port of a first device includes remote device detection logic to detect, on a link, a remote second device, determine, from a voltage generated at the port, whether the second device is direct current (DC)-coupled or alternating current (AC)-coupled to the link, and select one of first settings or second settings to be applied at the port in communications over the link with the second device based on whether the second device is DC-coupled or AC-coupled.

The present application relates to a cache invalidation unit for a computing system having a processor unit, CPU, with a cache memory, a main memory and at least one an alternate bus master unit. The CPU, the main memory and the at least one an alternate bus master unit are coupled via an interconnect for data communications between them. The cache invalidation unit generates one or more invalidation requests to the cache memory in response to the alternate bus master unit writing data to the main memory. The cache invalidation unit comprises a page address generator unit to generate page addresses relating to at least one address range and an invalidation request generator unit to generate an invalidation request for each page address. The one or more generated invalidation requests are transmitted by the cache invalidation unit via to the cache memory of the CPU.

A peripheral interface circuit and a peripheral memory system are provided. The peripheral interface circuit includes an interface sequencer, an input/output controller, a register unit and a data buffer. The interface sequencer receives requests from the input/output controller and accesses the peripheral memory in response to the requests. The data buffer is randomly accessed by address. If target data of the data access request exists in the data buffer, the input/output controller returns data from the data buffer in response to the request; if target data of the data access request does not exist in the data buffer, the input/output controller sends an interface request to the interface sequencer to access the peripheral memory and keeps a copy of at least the target data in the data buffer.

Arbitration circuitry is provided for arbitrating between requests awaiting servicing. The requests require variable numbers of resources and the arbitration circuitry permits the request to be serviced in a different order to the order in which they were received. Checking circuitry prevents a given request other than a oldest request from being serviced when a number of available resources is less than a threshold number of resources. The threshold number is varied based on the number of resources required for at least one other request awaiting servicing.

According to one embodiment, a first control module (CM) of a storage system receives a first request from a client device to read first data stored in a second storage location of a storage module, where the second storage location is associated with a second CM. The first CM includes a first processor and the second CM includes a second processor. The first CM transmits a first control signal the second CM via the inter-processor link to request the second CM to copy the first data from the second storage location to a first memory location associated with the first CM. The first CM initiates a first data transaction to transmit the first data from the first memory location to the client device through a communication fabric without having to go through the second CM.

A semiconductor device includes a plurality of circuits, a general bus configured to be connected to each of the plurality of circuits and to provide a general channel among the plurality of circuits, and a designated bus configured to be connected to a subgroup of circuits from among the plurality of circuits and to provide a designated channel among the subgroup of circuits.

A device and method for communicating, via a memory-mapped communication path, between a host processor and a cellular-communication modem are disclosed. The method includes providing logical channels over the memory-mapped communication path and transporting data organized according to one or more cellular communication protocols over at least one of the logical channels. In addition, the method includes acknowledging when data transfer occurs between the host processor and the cellular-communication modem, issuing commands between the host processor and the cellular-communication modem, and communicating and managing a power state via one or more of the logical channels.

A remote resource access method and a switching device are provided. According to the remote resource access method, when a computer system access the remote physical resource device, after obtaining a first access message, including a virtual address of a virtual resource device, from a computing node in the computer system, the switching device converts the first access message into a second access message based on a physical address of a physical resource device corresponding to the virtual address of the virtual resource device. Then, the switching device sends the second access message to the remote physical resource device corresponding to the physical address using a network, thereby implementing the data transmission between the local computer system and the remote physical resource device.

A transmission system includes: a master device; and a plurality of slave devices including a first slave device and a second slave device, each of the plurality of slave devices having its own identifier. The master device includes a processor configured to: transmit a control signal of a clock length that the first slave device does not respond to, to the plurality of slave devices at a first timing; and transmit an identifier that identifies the second slave device to the plurality of slave devices at a second timing after the first timing. The second slave device transmits data to the master device when the second slave device receives the control signal and the identifier that identifies the second slave device.

In a system where multiple controllers share a link interface but are not all (1) compatible with the same configuration of the physical layer or (2) using the same clocking, a configuration arbitration subsystem intercepts, organizes, and re-clocks configuration-access requests from the various controller agents. Priorities are assigned according to stored policies. The configuration arbiter grants configuration access to the top-priority agent, synchronizing the agent's message with the arbiter's clock. Lower-priority agents' messages are stored in command queues until they ascend to top priority. Besides preventing timing conflicts and streamlining the coordination of clocks, the configuration arbiter may provide access to physical-layer registers beyond the controllers' built-in capabilities to further optimize configuration.

Described is a computer-implemented method for preventing time out during data transfer to an input/output device. Dummy data is generated and transferred to the input/output device at a time during data transfer, such as when a time out event may occur that would end the data transfer. The transfer of dummy data prevents a time out event from occurring.

A method for using a shared device and a resource sharing system are provided. An arbitrator node sets an initial weight of each of processors based on identification information. The arbitrator node calculates a priority score for each processor based on an initial weight of each of the processors and state diagnostic codes recorded by each processor to establish a priority sequence. When the arbitrator node simultaneously receives a request for requesting an access right of the shared device transmitted by each of two or more processors, the arbitrator node determines one of the processors having the access right of the shared device based on the priority sequence.

A method for assigning addresses to nodes of a bus system, and installation, bus nodes being furnished with an identical delivery address, where (i) an assigning entity, particularly a central computer, start-up computer or bus node sends information to the delivery address via the bus system, (ii) the information includes a first address, (iii) an action is performed whose effect is detected by a first bus node, (iv) the first bus node accepts the first address, (v) the first bus node sends a response to the assigning entity, and (vi) steps (i) through (v) are repeated, each time with a further address for a further bus node.

A method for increasing compatibility of DisplayPort includes: providing a first source device, a second source device, a controller, and a sink device, wherein the first source device is connected to the controller; the first source device transmitting a first image signal to the sink device via a main link for displaying the first image signal on the sink device; causing the controller to disconnect from the first source device and connect to the second source device; executing a simulation process to generate a DC level variation on an auxiliary channel between the controller and the sink device; the second source device transmitting auxiliary data to the sink device; the sink device transmitting link data back to the second source device; and the second source device transmitting a second image signal to the sink device via a second main link for displaying the second image signal on the sink device.

An input/output module is provided for a bus system having a socket, the five contact cups of which each may comprise an electrical contact, and a measuring device for detecting a connector of a four-wire data cable. The measuring device can be configured to detect, when a connector is inserted into the socket, whether the connector comprises four or five electrical contact pins which are each plugged into one of the contact cups and are electrically connected to the respective electrical contact of the contact cups. The measuring device may be configured to close a first and a second switching device only when five electrical contact pins are detected in order to apply a respective supply voltage from two DC voltage supplies to the corresponding plugged contact pins of the connector plugged into the socket via the respective electrical contacts of the contact cups.

An embedded controller is provided for a computer, including a processor, first one or more logic elements providing a serial peripheral interface (SPI) module to communicatively couple the embedded controller to an SPI bus as an SPI slave, and second one or more logic elements providing a platform environment control interface (PECI)-over-SPI engine, to build an SPI packet providing an encapsulated PECI command and send a notification to an SPI master that the packet is available.

Technologies for controlling timing calibration of a dedicated inter-integrated circuit data bus by a primary microcontroller are disclosed. The primary microcontroller performs a data transfer with a secondary integrated circuit using the dedicated inter-integrated circuit data bus, and determines a duration of the data transfer. If the duration is outside of an acceptable range, the primary microcontroller updates one or more data transfer timing parameters so that the duration of future data transfers are closer to the acceptable range.

A solar collector includes a substrate having a top surface and a bottom surface opposite to the upper surface, a sidewall, a transparent cover, and a heat-absorbing layer. The sidewall is arranged on the periphery of the top surface of the substrate. The transparent cover is disposed on the sidewall opposite to the substrate to form a sealed chamber. The heat-absorbing layer is disposed on the upper surface of the substrate and includes a carbon nanotube film having a plurality of carbon nanotubes. The carbon nanotubes in the carbon nanotube film are joined end-to-end.

The invention is a system and method for heliostat mirror control. Here, each heliostat mirror generates a low intensity “signal beam”, directed at an angle off from the heliostat mirror's high intensity and sensor blinding “main beam” of reflected solar energy. The low intensity signal beams may be created by reflecting a small portion of the incident solar light at an angle from the main beam, by reflected artificial light, or from lasers shinning onto mirrors from known locations. The signal beams are detected by optical sensors mounted way from the main heliostat receiver focus, and can be used in a closed loop control system to efficiently ensure that individual heliostat mirrors in a heliostat array accurately track sunlight and direct the sunlight to a central receiver. Because heliostat mirrors need not be taken “off sun” for positioning, the system allows heliostat arrays to be run at high efficiency.

The present invention provides systems and methods for transferring heat using a variable composition organic heat transfer fluid that remains liquid over a wide operating temperature range useful for solar heating applications. Variable composition heat transfer fluids of the present invention comprise a miscible mixture, optionally a completely miscible mixture, of a high boiling point component selected for its beneficial high temperature physical properties, and a low freezing point component selected for its beneficial low temperature physical properties. In some embodiments, the low freezing point component is removed from the heat transfer fluid as the heat transfer fluid is heated, for example by being removed in the vapor phase, thereby selectively varying the composition and physical properties (e.g., vapor pressure, boiling point, etc.) of the heat transfer fluid as a function of temperature.

Mounting for a window in an oven appliance is provided so as to allow for thermal expansion during oven use. More particularly, an expansion zone is provided around the window such that, during heating of the window from oven operation, the window is allowed to expand without restraint that could cause cracking or shattering. Space can be allowed for both lateral and longitudinal expansion of the window.

Described herein are solar energy collector systems, components for solar energy collector systems, and methods for installing solar energy collector systems. The components for solar energy collector systems include but are not limited to solar radiation absorbers, receivers, drives, drive systems, reflectors, and various support structures. The solar energy collection systems, solar radiation absorbers, receivers, drives, drive systems, reflectors, support structures, and/or methods may be used, for example, in LFR solar arrays. Drives and drive systems are described herein that may provide improved rotational positioning, movement, and/or rotational positional sensing. For example, drives and drive systems are provided which allow operation through a variable frequency drive. The components and methods described herein may be used together in any combination in a solar collector system, or they may be used separately in different solar collector systems.

Racking assemblies for solar panel installations are provided. The racking assemblies may include a series of posts arranged in two parallel rows and anchored to the ground or other suitable surface. Purlins may be coupled to and may span the posts of each row. Specialized clamps may be used to attach the purlins to a series of mounting rails. The mounting rails, in turn, may support an array of solar modules.

A heater assembly can be used with a gas appliance. The gas appliance can be a dual fuel appliance for use with one of a first fuel type or a second fuel type different than the first. The heater assembly can include a fuel regulator valve including a main pressure regulator to regulate the fuel pressure, at least one auxiliary pressure regulator, a first fuel source connection for connecting the first fuel type to the heater assembly, and a second fuel source connection for connecting the second fuel type to the heater assembly. The one or more auxiliary pressure regulators introduce a backline pressure to the main pressure regulator, thereby adjusting the fuel pressure to fall within a predetermined range.

A thermal solar system having a fire rating of at least A. In a specific embodiment, the system includes a thermal solar module having an aperture region and a backside region. The system has a shaped thickness of material having a first side and a second side. In a preferred embodiment, the shaped thickness of material is characterized by a fire rating of at least A. The material has a thickness suitable to be free from penetration of moisture according to one or more embodiments. The thickness of material also has a structural characteristic capable of maintaining a shape and coupling to the backside region of the thermal solar module according to one or more embodiments. The system also has an air plenum provided between the thermal solar module and the thickness shaped thickness of material. In a preferred embodiment, the system further has a frame assembly operably coupled to the shaped thickness of material to support the shaped thickness of material and the thermal solar module.

A protective grill is provided for a portable infrared heater which reduces the possibility of a person from coming into contact with the radiation disk of the heater. The protective grill of this invention may be selectively detachably secured to the wheeled frame of a heater wherein the radiation disk thereof is positioned at one side of the wheeled frame or which may be selectively secured to the wheeled frame of the heater wherein the radiation disk of the heater is positioned at one end of the heater.

A solar collector positioning apparatus including a base structure and an intermediate frame connected to the base structure by at least two base support legs. The base support legs have a hinged connection to the base structure and a hinged connection to the intermediate frame, thereby constraining the movement of the intermediate frame to a plane substantially orthogonal to a plane occupied by the base structure. A solar collector support frame is connected to the intermediate frame by at least two intermediate support legs. The intermediate support legs have a hinged connection to the solar collector support frame and a hinged connection to the intermediate frame, thereby constraining the movement of the solar collector support frame to a plane substantially orthogonal to a plane occupied by the intermediate frame.

A heat pack for warming the heel of an infant with a front panel and a rear panel wherein the rear panel is adapted for placement on the infant's heel and has an outer layer formed of a nonwoven material which may be wetted. A band is provided for attaching the heat pack to the infant's heel. Heat from the heat pack effectively drives water applied to the nonwoven material into the infant's heel where it is then trapped in the skin under the heat pack. By thus moisturizing and softening the skin, a puncture necessary for taking a blood sample is eased.

The teachings generally relate to a system for converting solar energy into electrical energy and thermal energy using a self-contained system having a plurality of channels for the heat transfer using a respective plurality of fluids.