A fastener includes a cylindrical shaft, a screw head located at an uppermost portion of the cylindrical shaft and comprising a tool indentation therein, a threaded portion on the cylindrical shaft comprising a plurality of external threads, and a countersinking portion located between the threaded portion and the screw head and comprising a cutting section. The countersink portion is tapered from a first diameter equal to a diameter of the threaded portion to a second diameter that is equal to or larger than a diameter or a maximum width of the screw head. The countersinking portion is configured to form a countersink hole in a receiving material as the fastener is rotated and forced into the receiving material.

Safety apparatuses for objects having at least one nut are disclosed. Contemplated apparatuses comprise a base, one or more nut caps, and one or more electronic sensors configured to acquire data related to a corresponding nut, wheel or tire. In some embodiments, a physical nut rotation indicator that can readily be observed by an operator is included, and a retention wall disposed on the base can operate in conjunction with the physical nut rotation indicator to block a rotation of a nut. Apparatuses are preferably configured to remain stable in harsher environments.

A method for applying compression to a joint includes providing an intramedullary fixation assembly having a proximal screw member positioned at a proximal end of the intramedullary fixation assembly and a lag screw member positioned at a distal end of the intramedullary fixation assembly. Medullary canals are drilled in a first and second bone and the medullary canals are reamed. The proximal screw member is inserted into the first bone and a drill is used create a dorsal hole in the first bone. The lag screw member is slideably coupled to the dorsal hole and to the proximal screw member and into the second medullary canal. A torque is applied to the lag screw member to apply compression to the joint.

A fastener for attaching objects to channeled members wherein the objects have a hole extending therethrough and the channeled members have a longitudinal slot formed between projecting longitudinal walls. The fastener includes a button and a retainer. The button includes an abutment wall, an abutment surface and an axially extending slot. The retainer includes an engagement boss and a head at opposite ends of shaft. The retainer extends through the button slot. For attaching the object, the button extends through the object hole with the abutment wall adjacent the object and the abutment surface adjacent the channeled member. The retainer boss and part of the shaft extend through the longitudinal slot. The retainer is rotated for engaging the longitudinal walls with the boss. The longitudinal walls are sandwiched between the boss and the button abutment surface and the object is sandwiched between the channeled member and the button abutment wall.

A method and apparatus for an insulating cover for fasteners. In one advantageous embodiment, an apparatus comprises a washer and a cover. The washer is capable of receiving a fastener. The cover is capable of being secured to the insulating washer, wherein an insulating volume is created with the cover secured to the washer.

A system and method for positioning a tool. The system includes a base member configured to contact a first decking member and a second decking member; at least one base guide including a first end and an opposing second end, the first end coupled to the base member, the at least one base guide configured to position the base member relative to the first decking member and the second decking member; and an adjustable section coupled to the base member, the adjustable section configured to allow adjustment of at least one of a position and an angle of the tool relative to the base member. The system further includes a fastener configured to secure the first and/or second decking members to a joist.

An improved retention pin assembly and method of forming a pin assembly that uses a melt in a pocket without a metallurgical joint having been formed. The assembly can be generated by a method of forming a joint which includes providing a metal shaft and a member that is operable to receive the shaft. A pocket is formed within the member which operates to receive a melt pool. Next the shaft is inserted into apertures in the member. A welding or melting operation is then performed to create a melted portion that occupies the pocket. A joint is created using a retention pin.

In a mobile terminal having a security function, both convenience and security protection are realized so as to prevent a user from feeling bothersome. A mobile phone has an operation control unit which sets the operation of various functions of the mobile terminal to be unusable at any timing. When a used state determination unit determines that the mobile phone is not in an abnormal state and not left, the operation control unit controls operation of the various functions to maintain usable states.

Panel fasteners, panel assemblies, methods of assembly and installation of panel assemblies and panel fasteners, anchor systems, anchor systems with captive fasteners and assemblies are disclosed.

A threaded connector for securing a panel member to a structure and for adjusting the position of the panel member relative to the structure. The connector comprises an elongate one-piece stud, a first spacer, a threaded nut, a second spacer and a turning formation. The connector permits the panel member to be mounted on the stud and the stud to be rotated to adjust the position of the panel member relative to the structure.

A shift register is disclosed, which can prevent malfunctioning of device by decreasing the load on a discharging voltage source line, and can decrease a size of stage. The shift register comprises a plurality of stages to sequentially output scan pulses through respective output terminals, wherein each of the stages comprises a pull-up switching unit controlled based on a signal state of node, and connected between the output terminal and any one among a plurality of clock transmission lines to transmit the clock pulses provided with sequential phase differences; and a node controller to control the signal state of node, and to discharge the node by using the clock pulse from any one among the plurality of clock transmission line.

A shift register and driving method thereof, a gate driving apparatus and a display apparatus, the shift register comprises a pulling-up unit(21), a precharging and resetting unit(22), an output signal terminal at present stage(OUTPUT), a pulling-down unit(23), an input terminal connected to an output signal terminal of a shift register at previous stage(OUTF), an input terminal connected to an output signal terminal of a shift register at next stage(OUTL), and a scan control signal input terminal(INPUT), wherein: the precharging and resetting unit(22) precharges a gate of a first thin film transistor(T1) included in the pulling-up unit(21) and resets its potential; the pulling-down unit(23) pulls down a potential at the gate of the first thin film transistor(T1) and the output signal at present stage after the precharging and resetting unit(22) resets the potential at the gate of the first thin film transistor(T1), so that the pulling-up unit(21) is turned off and the output signal at present stage is at a low level. The present shift register realizes a bidirectional gate driving scan from up to down or from down to up by a conversion control for high-low levels of input signals.

Various structures and methods are disclosed related to configurable scrambling circuitry. Embodiments can be configured to support one of a plurality of protocols. Some embodiments relate to a configurable multilane scrambler that can be adapted either to combine scrambling circuits across a plurality of lanes or to provide independent lane-based scramblers. Some embodiments are configurable to select a scrambler type. Some embodiments are configurable to adapt to one of a plurality of protocol-specific scrambling polynomials. Some embodiments relate to selecting between least significant bit (“LSB”) and most significant bit (“MSB”) ordering of data. In some embodiments, scrambler circuits in each lane are adapted to handle data that is more than one bit wide.

A display panel drive circuit includes a shift register constructed of unit circuits connected in stages. The unit circuits generate signal line selection signals, respectively, which signal line selection signals are made active for a respective certain period of time to form a respective pulse, and the pulses are outputted successively from respective unit circuits in order of ordinal number starting from a first stage until an end stage. In at least one embodiment, each of the unit circuits receive (i) clock signals generated based on a sync signal received from outside of the display panel drive circuit, (ii) a start pulse signal generated based on the sync signal, or a signal line selection signal generated in a stage different from its own stage, and (iii) a clear signal. The clear signal is made active in a case where anomalousness is included in the sync signal, and no pulse is outputted from the shift register until a subsequent vertical scanning period starts. This configuration achieves a display panel drive circuit which prevents display disorder or holds down increase in load given to a power source, each of which occurs in a case where anomalousness is included in the sync signal.

A scan driving apparatus includes a plurality of sequentially arranged scan driving blocks, each including: a first node configured to receive a first clock signal; a second node configured to receive an input signal according to a second clock signal input; a first transistor having a gate electrode coupled to the first node, a first electrode configured to receive a power source voltage, and a second electrode coupled to an output terminal; and a second transistor having a gate electrode coupled to the second node, a first electrode for receiving a third clock signal, and a second electrode coupled to the output terminal. Each scan driving block is configured to receive the first, second, and third clock signals as a corresponding three clock signals among four clock signals sequentially shifted by a first period, and to output the third clock signal by being synchronized with the input signal.

Disclosed herein is a shift register in which leakage of charges from a voltage at a set node is prevented to stabilize an output from a stage. The shift register includes a plurality of stages for sequentially outputting scan pulses. Each stage includes a node controller for controlling signal states of a set node and a reset node, and an output unit supplied with any one of a plurality of clock pulses having different phases. The output unit outputs the supplied clock pulse as a scan pulse through an output terminal thereof according to the signal states of the set node and reset node. The node controller includes a first discharging switching device which is turned on or off in response to a scan pulse from a downstream stage. The first discharging switching device is connected between any one of a plurality of clock transfer lines and the set node.

Methods, systems and devices are provided for displaying monitored activity data in substantial real-time on a screen of a computing device. One example method includes capturing motion data associated with activity of a user via an activity tracking device. The motion data is quantified into a plurality of metrics associated with the activity of the user. The method includes connecting the activity tracking device with a computing device over a wireless data connection, and sending motion data from the activity tracking device to the computing device for display of one or more of the plurality of metrics on a graphical user interface of the computing device. At least one of the plurality of metrics displayed on the graphical user interface is shown to change in substantial real-time based on the motion data.

A counter is provided, where, as the number of events that occur increases, the frequency in which the events are counted is scaled.

A shift register, comprising a plurality of shift register sub-units connected in cascade, each of the plurality of shift register sub-units comprising first to third TFTs, an eleventh TFT, a first capacitor and a first reset control module for controlling the second TFT to be turned on or off. Besides the shift register sub-unit at a first stage, for each of the shift register sub-units at other stages, the second TFT gate control terminal thereof is connected to the third TFT gate control terminal of the shift register sub-unit at a previous stage. Accordingly, a gate driving circuit comprising the shift register and a display comprising the gate driving circuit are provided. Compared with the prior art, reliability of the shift register is highly improved and area occupied by the shift register is smaller.

A wearable device has a carrier having an aperture. A device has a USB connection and a protrusion wherein the protrusion is received in the aperture to connect the device to a wristband. The device is a USB type device having athletic functionality. The device may further be configured to receive calibration data such that a measured distance may be converted to a known distance based on athletic activity performed by a user.

A shift register includes a plurality of stages of unit circuits each including a flip-flop. Each of the unit circuits generates, by obtaining a sync signal in accordance with an output from the flip-flop, an output signal. The flip-flop includes a first switch and a second switch and a latch circuit for latching a signal supplied thereto and outputting the signal as the output from the flip-flop. A first shift direction signal is supplied to the latch circuit via the first switch, and the second shift direction signal is supplied to the latch circuit via the second switch. In each unit circuit other than those of the first and last stages, an output signal from a previous stage is supplied to a control terminal of the first switch, and an output signal from a subsequent stage is supplied to a control terminal of the second switch.

Methods, devices and system are provided. One method includes capturing activity data associated with activity of a user via a device. The activity data is captured over time, and the activity data is quantifiable by a plurality of metrics. The method includes storing the activity data in storage of the device and, from time to time, connecting the device with a computing device over a wireless communication link. The method defines using a first transfer rate for transferring activity data captured and stored over a period of time. The first transfer rate is used following startup of an activity tracking application on the computing device The method also defines using a second transfer rate for transferring activity data from the device to the computing device for display of the activity data in substantial-real time on the computing device.

The present invention provides a shift register unit, a shift register circuit, an array substrate and a display device, and relates to the area of display manufacturing. The time of the bias working on the de-noising transistor can be reduced without affecting the circuit stability, so that the operational lifespan of the device can be extended. A shift register comprises: a capacitor, a first transistor, a second transistor, a third transistor, a fourth transistor, a fifth transistor, a sixth transistor, a de-noising control model. The present invention is used for manufacturing displays.

A shift register includes cascade-connected stages, each of which includes a data latch and an output stage. In at least one embodiment, the latch has a single data input which, in use, receives a date signal from a preceding or succeeding stage. The output stage includes a first switch, which passes a clock signal to the stage output when the output stage is activated by the latch. The output stage also comprises a second switch, which passes the lower supply voltage to the stage output when the output stage is inactive.

A display device including various portions, circuits and other arrangements for outputting various pulses and triggers, for controlling forward shift and backward shift operations.

A shift register circuit includes a first shift register string and a second shift register string. The first shift register string is configured to receive a first start signal and output a first-stage control signal. The second shift register string, electrically connected to the first shift register string, is configured to receive the first-stage control signal and a second start signal and output the first pulse of a first-stage scan signal according to the first-stage control signal and the second start signal and consequently output the second pulse of the first-stage scan signal according to the second start signal; wherein the first and second pulses are configured to have different pulse widths. A driving method of a shift register circuit is also provided.

A reset circuit for Gate Driver on Array, an array substrate and a display is used for increasing reliability and long-term stability of a GOA circuit and thus improving performance of the GOA circuit. The GOA reset circuit includes a first electronic switch circuit (301) connected to an input terminal of a GOA unit of the Gate Driver on Array (INPUT); and a second electronic switch circuit connected to an output terminal of the GOA unit (OUTPUT), wherein the first electronic switch circuit (301) is connected to a low level signal terminal and is switched on to connect the low level signal terminal to a reset terminal of the GOA unit (RESET) when the input terminal of the GOA unit (INPUT) is at a high level; and the second electronic switch circuit (302) is connected to a high level signal terminal and is switched on to connect the high level signal terminal to the reset terminal of the GOA unit (RESET) when the output terminal of the GOA unit (OUTPUT) is at a high level.

An n-bit counter is formed from cascading counter sub-modules. The counter includes combinatorial control logic coupled to a lower order counter sub-module. The control logic is arranged to clock gate at least one higher order counter sub-module dependent on a logical combination of outputs of the lower order counter sub-module and where the control logic uses pipelining to store at least one previous control logic output for use in determining a later control logic output.

A method and system for synchronizing the output signal phase of a plurality of frequency divider circuits in a local-oscillator (LO) or clock signal path is disclosed. The LO path includes a plurality of frequency divider circuits and a LO buffer for receiving a LO signal coupled to the plurality of frequency divider circuits. The method and system comprise adding offset voltage and setting predetermined state to each of the frequency divider circuits; and enabling the frequency divider circuits. The method and system includes enabling the LO buffer to provide the LO signal to the frequency divider circuits after they have been enabled. When the LO signal drives each of the frequency divider circuits, each of the frequency divider circuits starts an operation. Finally the method and system comprise removing the offset voltage from each of the frequency divider circuits to allow them to effectively drive other circuits.

To provide a pulse signal output circuit and a shift register which have lower power consumption, are not easily changed over time, and have a longer lifetime. A pulse signal output circuit includes a first input signal generation circuit; a second input signal generation circuit; an output circuit which includes a first transistor and a second transistor and outputs a pulse signal in response to a signal output from the first and second input signal generation circuits; a monitor circuit which obtains the threshold voltages of the first and second transistors; and a power supply output circuit which generates a power supply potential raised by a potential higher than or equal to a potential which is equal to or substantially equal to the threshold voltage and supplies the power supply potential to the first and second input signal generation circuits. A shift register includes the pulse signal output circuit.

Disclosed herein is a shift register circuit that is formed on an insulating substrate with thin film transistors having channels of the same conductivity type and includes shift stages, each of the shift stages including: a first thin film transistor; a second thin film transistor; a 3(1)-th thin film transistor; a 3(2)-th thin film transistor; a 4(1)-th thin film transistor; a 4(2)-th thin film transistor; a fifth thin film transistor; and a sixth thin film transistor.

An active level shift (ALS) driver circuit and a liquid crystal display apparatus including the ALS driver circuit are disclosed. The ALS driver circuit includes an input unit configured to apply a first polarity voltage to a first node and to apply a second polarity voltage to a second node, a level compensation unit configured to adjust the voltages of the first node and the second node, and an output unit configured to alternately output a first power voltage and a second power voltage according to the adjusted voltages of the first and second nodes.

An open loop clock divider circuit includes (a) a first divider configured to receive an incoming clock signal and output a first divided clock signal, (b) a flying-adder synthesizer configured to fractionally divide the first divided clock signal and output a fractionally divided clock signal, and (c) a second divider configured to receive the fractionally divided clock signal and output a second divided clock signal. The open loop clock divider circuit advantageously provides a fractional divider in which there is no feedback loop between the source frequency (fs) and the destination frequency (fd). Methods of generating a divided clock signal involving the open loop clock divider circuit are also disclosed.

A digital fractional frequency divider for fractionally dividing a digital frequency signal can include a plurality of clock division counter modules, a plurality of sampling modules, and a summing module. The plurality of clock division counter modules can each receive an input clock signal that is phase-shifted from a remaining plurality of input clock signals. Each clock division counter module can generate a long periodic pulse from the received input clock signal. Each sampling module can couple to an output of one of the plurality of clock division counter modules and can generate a short periodic pulse from the long periodic pulse. The summing module can sum the plurality of short periodic pulses to generate a fractional frequency clock signal.

A flip-flop includes: a first, second, third, and fourth transistors; input terminals; and first and second output terminals, the first and second transistors constituting a first CMOS circuit such that gate terminals are connected and drain terminals are connected, the third and fourth transistors constituting a second CMOS circuit such that gate terminals are connected and drain terminals are connected, the first output terminal connected to a gate side of the first CMOS circuit and a drain side of the second CMOS circuit, the second output terminal connected to a gate side of the second CMOS circuit and a drain side of the first CMOS circuit, at least one input transistor included in the group of the first through fourth transistors, a source terminal of the input transistor being connected to one of the input terminals. This can provide a further compact flip-flop.

An output thin film transistor threshold voltage offset compensation circuit, a GOA circuit, and a display. The circuit includes: a first capacitor, comprising a first electrode and a second electrode, the first electrode being connected to the gate of an output thin film transistor and receiving a charge signal, the second electrode being connected to the drain of the output thin film transistor, the first capacitor being used for, under the action of the charge signal, making the first electrode and the second electrode have a same voltage, so that a voltage difference between the drain and the source of the output thin film transistor is equal to a threshold voltage thereof; a first switch unit, connected to the drain and the source of the output thin film transistor, and opening under the action of a first clock signal, so that a voltage difference between the gate and the source of the output thin film transistor is equal to the threshold voltage thereof.

A single wire serial interface for power ICs and other devices is provided. To use the interface, a device is configured to include an EN/SET input pin. A counter within the device counts clock pulses sent to the EN/SET input pin. The output of the counter is passed to a ROM or other decoder circuit. The ROM selects an operational state for the device that corresponds to the value of the counter. In this way, control states may be selected for the device by sending corresponding clock pulses to the EN/SET pin. Holding the EN/SET pin high causes the device to maintain its operational state. Holding the EN/SET pin low for a predetermined timeout period resets the counter and causes the device to adopt a predetermined configuration (such as off) until new clock pulses are received at the EN/SET pin.

One of the most important RF building blocks today is the frequency synthesizer, or more particularly the programmable frequency divider (divider). Such dividers preferably would support unlimited range with continuous division without incorrect divisions or loss of PLL lock. The inventors present multi-modulus dividers (MMDs) providing extended division range against the prior art and without incorrect divisions as the division ratio is switched back and forth across the boundary between two different ranges. Accordingly, the inventors present MMD frequency dividers without the drawbacks within the prior art.

The present invention relates to a liquid crystal display (LCD) device. More particularly, the present invention relates to an LCD device including a thin film transistor (TFT) compensation circuit in an LCD device which implements a driving circuit by using an oxide TFT, the LCD device capable of compensating for degraded characteristics of a TFT due to threshold voltage shift. As the compensation circuit including a dummy TFT is formed on a non-active area of the LC panel, the degree of threshold voltage shift of the DT due to a DC voltage can be sensed. Based on the sensed result, a threshold voltage of a second TFT can be compensated. This can reduce lowering of a device characteristic.

A shift register unit comprises: a first transistor, a pulling-up close unit, a pulling-up start unit, a first pulling-up unit, a second pulling-up unit, a trigger unit, and an output unit. A shift register circuit, an array substrate and a display device are also provided. The shift register unit, the shift register circuit, the array substrate and the display device can reduce drift of a gate threshold voltage of a gate line driving transistor and improve operation stability of devices.

A display apparatus and a method for generating gate signal thereof are provided. The display apparatus includes a timing controller and a display panel. The timing controller is used for providing a plurality of timing signals. The display panel includes a pixel array and a gate drive circuit. The pixel array has a plurality of pixels. The gate drive circuit is electrically connected to the timing controller and the pixel array and including a plurality of shift register circuits. The shift register circuit includes a first shift register and a second shift register. The first shift register is configured for generating a corresponding primary gate signal. The second shift register is configured for generating a corresponding secondary gate signal. The timing controller adjusts overlapping relations of the timing signals according to a frame rate of the display apparatus.

An LCD and a bidirectional shift register device thereof are provided. The bidirectional shift register device of the invention is disposed on the substrate of the panel and includes multi-stages shift registers in series connection. Each stage shift register includes a pre-charging unit, a pull-up unit and a pull-down unit, in which the pre-charging unit receives a first preset clock signal and the output from a (i−1)th stage shift register or a (i+1)th stage shift register so as to thereby output a charging signal. The pull-up unit receives the charging signal and a second preset clock signal so as to thereby output a scan signal. The pull-down unit receives the second preset clock signal, a third preset clock signal and the output from the (i+2)th stage shift register or the (i−2)th stage shift register so as to decide whether or not pulling down the scan signal to a reference level.

A system for optimizing storage in an enclosed transport trailer (6), having transverse bearing beams (2) for supporting a load such as loaded pallets (12, 13) at a mid height of the trailer such that two storage levels are available. The beams have a wheel (10) at each end that runs in a horizontal track (11) attached to each side wall of the trailer, the track enclosing the wheels to prevent them from disengaging from the track. Adjacent beams can be attached together at variable spacings using a spacer bar (15) to suit a particular pallet or load size. The track has a junction adjacent the open end (20) of the trailer that leads up to another track (18) immediately below the roof line where the beams can be moved to an out of the way storage position (19) when not required.

A vehicle restraint system includes a strap assembly configured to be positioned on a portion of a tire of a vehicle to secure the vehicle to a deck of a transport. The strap assembly is also configured to be coupled to the deck of the transport on a first side of the tire of the vehicle. The system also includes a mandrel assembly operable to be coupled to the strap assembly on a second side of the tire of the vehicle, opposite the first side. The system further includes a winch assembly configured to be coupled to the deck of the transport and the mandrel assembly on the second side of the tire of the vehicle, the winch assembly configured to rotate the mandrel assembly to produce a tightening force to tighten the strap assembly around the portion of the tire. The system still further includes a release mechanism disposed between the winch assembly and the mandrel assembly and configured to create a coupling between the winch assembly and the mandrel assembly in a manner that transmits the tightening force from the winch assembly to the mandrel assembly. The release mechanism is configured to release the coupling between the winch assembly and the mandrel assembly when a force greater than or equal to a predetermined force is produced against the release mechanism.

There is provided a transport vehicle for transporting wind power installation rotor blades and/or pylon segments. The transport vehicle has a transport support structure having a main frame, a receiving frame fixedly connected to the main frame at a first angle, and a rotary displacement unit which is fixed with one end to the receiving frame and which at its second end has a blade adaptor for receiving a rotor blade or a pylon segment. The main frame spans a main plane. The rotary displacement unit has at least one first rotary mounting, wherein there is provided a second angle between the second rotary plane of the second rotary mounting.

A transportation and storage system for a wind turbine rotor blade comprises a tip end frame assembly comprising a tip end receptacle and a tip end frame. The tip end receptacle comprises an upwardly open tip end-receiving space for receiving a portion of the tip end of the blade and having a supporting surface for supporting the blade, a lower surface allowing the tip end receptacle to rest upright on a substantially horizontal surface, such as the ground, and releasable retaining means for releasably retaining the tip end of the blade in the receiving space of the tip end receptacle. The tip end frame comprises an upwardly open receptacle-receiving space for receiving the receptacle and provided with positioning means for positioning the receptacle in the tip end frame. A base part defines a bottom surface allowing the tip end frame to rest upright on the ground.

A transport system for transporting large items wherein the large items comprise at least three through going holes and said system comprises a frame to support the items. Said frame has a substantially rectangular shape and comprises two parallel longitudinal beams connected by two parallel transverse beams and further comprises at least two transverse support bars to support the items, which transverse support bars are located between the two parallel transverse beams. The transport system further comprises a first and a second rod to be mounted in two through going holes in the items where each end of the first and second rod can be connected to the longitudinal beams to secure the items to the frame in such a way that no part of the large items extends over the rectangle defined by the two parallel longitudinal beams and the two parallel transverse beams.

An apparatus for securing a cargo item within a cargo area that is defined by a pickup truck bed and a bed liner that is disposed within the pickup truck bed, the bed liner defining a plurality of elongate grooves. The apparatus includes a rod that extends along an axis in an axial direction of the rod. An engaging structure is receivable within at least one groove from the plurality of elongate grooves of the bed liner for engagement with the bed liner. An adjustable connecting structure connects the engaging structure to the rod and allows adjustment of an axial position of the engaging structure along the rod in the axial direction of the rod. A body is connected to the rod for engaging the cargo item.

A load carrier includes a load changing frame that has first and second end portions. The load changing frame has two longitudinal frame beams, two transverse frame beams arranged at the end portions of the load changing frame, and a first, upwardly tapering lifting stand. The second end portion of the load changing frame includes a second lifting stand, which is shaped and arranged in accordance with the first lifting stand. The transverse frame beams are elongated to extend outward from the longitudinal frame beams for mounting of supports facing the support surface. A plurality of such load carriers are adapted to be stacked on top of each other, wherein each overlying load carrier with its lifting stands is adapted to straddle the lifting stands of the underlying load carrier vertically from above, wherein the length of the stack corresponds to the length of the load carrier.

Some embodiments include a novel laced strapping system that provides a plurality of attachment points by which a tie-down lace can adjust the fit of a cargo mesh webbing to secure loads of items in an open bed of a vehicle. In some embodiments, the vehicle is a pick-up truck with a cargo bed. In some embodiments, the mesh webbing comprises a first truck bed mesh, a second truck bed mesh, and the plurality of attachment points. In some embodiments, tie-down lace interconnects the attachment points to secure together the first mesh and the second mesh.