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Semiconductor device for restraining creep-age phenomenon and fabricating method thereof

The present invention relates generally to a semiconductor device and, more specifically, to optimizing the creep-age distance of the power semiconductor device and a preparation method thereof. The power semiconductor device includes a chip mounting unit with a die paddle and a plurality of leads arranged side by side located close to one side edge of the die paddle in a non-equidistant manner, a semiconductor chip attached on the die paddle, and a plastic packaging body covering the die paddle, the semiconductor chip, where the plastic packing body includes a plastic extension portion covering at least a part of a lead shoulder of a lead to obtain better electrical safety distance between the terminals of the semiconductor device, thus voltage creep-age distance of the device is increased.




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Microelectromechanical system devices having through substrate vias and methods for the fabrication thereof

Methods for the fabrication of a Microelectromechanical Systems (“MEMS”) devices are provided, as are MEMS devices. In one embodiment, the MEMS device fabrication method includes forming at least one via opening extending into a substrate wafer, depositing a body of electrically-conductive material over the substrate wafer and into the via opening to produce a via, bonding the substrate wafer to a transducer wafer having an electrically-conductive transducer layer, and forming an electrical connection between the via and the electrically-conductive transducer layer. The substrate wafer is thinned to reveal the via through a bottom surface of the substrate wafer, and a backside conductor is produced over a bottom surface of the substrate wafer electrically coupled to the via.




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Interconnect structure and method of forming the same

An interconnect structure and a method of forming an interconnect structure are disclosed. The interconnect structure includes a lower conductive feature in a lower low-k (LK) dielectric layer; a first etch stop layer (ESL) over the lower conductive feature, wherein the first ESL comprises a metal compound; an upper LK dielectric layer over the first ESL; and an upper conductive feature in the upper LK dielectric layer, wherein the upper conductive feature extends through the first ESL and connected to the lower conductive feature. The interconnect structure may further include a second ESL between the upper LK dielectric layer and the first ESL, or between the first ESL and the lower conductive feature, wherein the second ESL comprises a silicon compound.




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Method for producing a solder joint

A method for producing a solder joint between at least one base part (2) and at least one first component (3) includes the following steps: providing the base part (2); partially blasting a surface of the base part (2) using a SACO blasting agent, the blasting material (50) of which has a silicate coating (52), in such a way that a SACO-blasted region (20) and a non-blasted positioning region (40) are present; and soldering the at least first component (3) onto the non-blasted positioning region (40), wherein the SACO-blasted region (20) acts as a solder resist.




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Merged fiducial for semiconductor chip packages

Systems, manufactures, methods and/or techniques for a merged fiducial for chip packages are described. According to some embodiments, an integrated circuit package may include a package substrate having a first side and a second side, a plurality of conductive traces coupled to the first side and a plurality of balls disposed on the second side. The balls may be adapted to electrically connect the laminate package to a circuit board. The integrated circuit package may include a plurality of ball pads disposed on the second side, the ball pads being adapted to electrically connect the plurality of balls to the plurality of conductive traces. One or more of the ball pads may be uniquely shaped when compared to the rest of the plurality of ball pads, optionally, to serve as a fiducial to designate an A1 pin or ball of the laminate package.




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Camera module for tilt balance of lens

The present invention relates to a camera module including: a lens unit mounted with at least one or more lenses; an image sensor mounted with an image pickup device for converting a light converged through the lenses to an electric signal; a PCB (Printed Circuit Board) mounted with the image sensor; and a holder accommodated inside the lens unit for supporting the lens unit, wherein the lens unit is bonded and fixed at an inner surface of the holder, whereby the lens unit mounted with a plurality of lenses is bonded to a lateral surface of a holder to prevent generation of vertical tilting phenomenon at the lens unit caused by a conventional improper coating of epoxy, and particularly, the coating of epoxy on the lateral surface of the holder advantageously enhances adhesive power to increase a bonded area.




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Methods and systems for global knowledge sharing to provide corrective maintenance

Described herein are methods and systems for providing corrective maintenance using global knowledge sharing. A method to provide corrective maintenance with a CM system includes performing a query to generate a ranking of fixable causes based on factors (e.g., symptoms, configuration, test). The ranking may be determined based on a fixable cause percent match with the factors. The ranking of fixable causes may be associated with one or more solutions for each fixable cause. The ranking can be updated based on performing tests or solutions.




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Method for fabricating sensor

A method for fabricating a sensor includes: forming, on a base substrate, a pattern of a source electrode and a drain electrode, a pattern of a data line, a pattern of a receiving electrode, a pattern of a photodiode, and a pattern of a transparent electrode disposed by using a first patterning process; forming a pattern of an ohmic layer by using a second patterning process; forming a pattern of an active layer by using a third patterning process; forming a pattern of a gate insulating layer by using a fourth patterning process, wherein the gate insulating layer has a via hole above the transparent electrode; and forming a pattern of a gate electrode, a pattern of a gate line, and a pattern of a bias line connected to the transparent electrode via the via hole above the transparent electrode by using a fifth patterning process.




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Method for manufacturing semiconductor device

A larger substrate can be used, and a transistor having a desirably high field-effect mobility can be manufactured through formation of an oxide semiconductor layer having a high degree of crystallinity, whereby a large-sized display device, a high-performance semiconductor device, or the like can be put into practical use. A first multi-component oxide semiconductor layer is formed over a substrate and a single-component oxide semiconductor layer is formed thereover; then, crystal growth is carried out from a surface to an inside by performing heat treatment at 500° C. to 1000° C. inclusive, preferably 550° C. to 750° C. inclusive so that a first multi-component oxide semiconductor layer including single crystal regions and a single-component oxide semiconductor layer including single crystal regions are formed; and a second multi-component oxide semiconductor layer including single crystal regions is stacked over the single-component oxide semiconductor layer including single crystal regions.




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Method for manufacturing organic light-emitting device

A method for manufacturing a light-emitting device includes a step of forming an etching resistant protection layer on a substrate provided with an organic planarizing layer, a step of forming a plurality of electrodes on the etching resistant protection layer, a step of forming an organic compound layer on the substrate provided with the plurality of electrodes, a step of forming a resist layer on the organic compound layer formed on parts of electrodes among the plurality of electrodes using a photolithographic method, and a step of removing the organic compound layer in a region not covered with the resist layer by dry etching, wherein an entire surface of the organic planarizing layer on the substrate on which steps up to the step of forming the plurality of electrodes have been performed is covered with at least one of the etching resistant protection layer and the electrode.




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Method for manufacturing SOI substrate

An object of an embodiment of the present invention to be disclosed is to prevent oxygen from being taken in a single crystal semiconductor layer in laser irradiation even when crystallinity of the single crystal semiconductor layer is repaired by irradiation with a laser beam; and to make substantially equal or reduce an oxygen concentration in the semiconductor layer after the laser irradiation comparing before the laser irradiation. A single crystal semiconductor layer which is provided over a base substrate by bonding is irradiated with a laser beam, whereby the crystallinity of the single crystal semiconductor layer is repaired. The laser irradiation is performed under a reducing atmosphere or an inert atmosphere.




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Semiconductor device and method of forming protection and support structure for conductive interconnect structure

A semiconductor device has a semiconductor wafer with a plurality of contact pads. A first insulating layer is formed over the semiconductor wafer and contact pads. A portion of the first insulating layer is removed, exposing a first portion of the contact pads, while leaving a second portion of the contact pads covered. An under bump metallization layer and a plurality of bumps is formed over the contact pads and the first insulating layer. A second insulating layer is formed over the first insulating layer, a sidewall of the under bump metallization layer, sidewall of the bumps, and upper surface of the bumps. A portion of the second insulating layer covering the upper surface of the bumps is removed, but the second insulating layer is maintained over the sidewall of the bumps and the sidewall of the under bump metallization layer.




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Stacked microelectronic packages having patterned sidewall conductors and methods for the fabrication thereof

Embodiments of a method for fabricating stacked microelectronic packages are provided, as are embodiments of a stacked microelectronic package. In one embodiment, the method includes arranging microelectronic device panels in a panel stack. Each microelectronic device panel includes a plurality of microelectronic devices and a plurality of package edge conductors extending therefrom. Trenches are formed in the panel stack exposing the plurality of package edge conductors. An electrically-conductive material is deposited into the trenches and contacts the plurality of package edge conductors exposed therethrough. The panel stack is then separated into partially-completed stacked microelectronic packages. For at least one of the partially-completed stacked microelectronic packages, selected portions of the electrically-conductive material are removed to define a plurality of patterned sidewall conductors interconnecting the microelectronic devices included within the stacked microelectronic package.




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Semiconductor device and method for manufacturing the same

It is an object to provide a semiconductor device including a thin film transistor with favorable electric properties and high reliability, and a method for manufacturing the semiconductor device with high productivity. In an inverted staggered (bottom gate) thin film transistor, an oxide semiconductor film containing In, Ga, and Zn is used as a semiconductor layer, and a buffer layer formed using a metal oxide layer is provided between the semiconductor layer and a source and drain electrode layers. The metal oxide layer is intentionally provided as the buffer layer between the semiconductor layer and the source and drain electrode layers, whereby ohmic contact is obtained.




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Process for preparing a semiconductor structure for mounting

A process for preparing a semiconductor structure for mounting to a carrier is disclosed. The process involves causing a support material to substantially fill a void defined by surfaces formed in the semiconductor structure and causing the support material to solidify sufficiently to support the semiconductor structure when mounted to the carrier.




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Method for fabricating a semiconductor device by bonding a layer to a support with curvature

The object of the invention is to provide a method for fabricating a semiconductor device having a peeled layer bonded to a base material with curvature. Particularly, the object is to provide a method for fabricating a display with curvature, more specifically, a light emitting device having an OLED bonded to a base material with curvature. An external force is applied to a support originally having curvature and elasticity, and the support is bonded to a peeled layer formed over a substrate. Then, when the substrate is peeled, the support returns into the original shape by the restoring force, and the peeled layer as well is curved along the shape of the support. Finally, a transfer object originally having curvature is bonded to the peeled layer, and then a device with a desired curvature is completed.




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Method and structure for integrating capacitor-less memory cell with logic

Methods for fabricating integrated circuits include fabricating a logic device on a substrate, forming an intermediate semiconductor substrate on a surface of the logic device, and fabricating a capacitor-less memory cell on the intermediate semiconductor substrate. Integrated circuits with capacitor-less memory cells formed on a surface of a logic device are also disclosed, as are multi-core microprocessors including such integrated circuits.




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Texturing a layer in an optoelectronic device for improved angle randomization of light

Embodiments generally relate to optoelectronic devices and more specifically, to textured layers in optoelectronic devices. In one embodiment, a method for providing a textured layer in an optoelectronic device includes depositing a first layer of a first material and depositing an island layer of a second material on the first layer. Depositing the island layer includes forming one or more islands of the second material to provide at least one textured surface of the island layer, where the textured surface is operative to cause scattering of light.




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Method for manufacturing semiconductor device

To provide a method by which a semiconductor device including a thin film transistor with excellent electric characteristics and high reliability is manufactured with a small number of steps. After a channel protective layer is formed over an oxide semiconductor film containing In, Ga, and Zn, a film having n-type conductivity and a conductive film are formed, and a resist mask is formed over the conductive film. The conductive film, the film having n-type conductivity, and the oxide semiconductor film containing In, Ga, and Zn are etched using the channel protective layer and gate insulating films as etching stoppers with the resist mask, so that source and drain electrode layers, a buffer layer, and a semiconductor layer are formed.




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Semiconductor element and method for manufacturing the same

An object is to provide a thin film transistor and a method for manufacturing the thin film transistor including an oxide semiconductor with a controlled threshold voltage, high operation speed, a relatively easy manufacturing process, and sufficient reliability. An impurity having influence on carrier concentration in the oxide semiconductor layer, such as a hydrogen atom or a compound containing a hydrogen atom such as H2O, may be eliminated. An oxide insulating layer containing a large number of defects such as dangling bonds may be formed in contact with the oxide semiconductor layer, such that the impurity diffuses into the oxide insulating layer and the impurity concentration in the oxide semiconductor layer is reduced. The oxide semiconductor layer or the oxide insulating layer in contact with the oxide semiconductor layer may be formed in a deposition chamber which is evacuated with use of a cryopump whereby the impurity concentration is reduced.




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Method for producing Ga-containing group III nitride semiconductor

A method for producing a Ga-containing group III nitride semiconductor having reduced threading dislocation is disclosed. A buffer layer in a polycrystal, amorphous or polycrystal/amorphous mixed state, comprising AlGaN is formed on a substrate. The substrate having the buffer layer formed thereon is heat-treated at a temperature higher than a temperature at which a single crystal of a Ga-containing group III nitride semiconductor grows on the buffer layer and at a temperature that the Ga-containing group III nitride semiconductor does not grow, to reduce crystal nucleus density of the buffer layer as compared with the density before the heat treatment. After the heat treatment, the temperature of the substrate is decreased to a temperature that the Ga-containing group III nitride semiconductor grows, the temperature is maintained, and the Ga-containing group III nitride semiconductor is grown on the buffer layer.




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Method of forming 3D integrated microelectronic assembly with stress reducing interconnects

A microelectronic assembly and method of making, which includes a first microelectronic element (including a substrate with first and second opposing surfaces, a semiconductor device, and conductive pads at the first surface which are electrically coupled to the semiconductor device) and a second microelectronic element (including a handler with first and second opposing surfaces, a second semiconductor device, and conductive pads at the handler first surface which are electrically coupled to the second semiconductor device). The first and second microelectronic elements are integrated such that the second surfaces face each other. The first microelectronic element includes conductive elements each extending from one of its conductive pads, through the substrate to the second surface. The second microelectronic element includes conductive elements each extending between the handler first and second surfaces. The conductive elements of the first microelectronics element are electrically coupled to the conductive elements of the second microelectronics element.




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Semiconductor device and method of forming interconnect structure for encapsulated die having pre-applied protective layer

A semiconductor device has a protective layer formed over an active surface of a semiconductor wafer. The semiconductor die with pre-applied protective layer are moved from the semiconductor wafer and mounted on a carrier. The semiconductor die and contact pads on the carrier are encapsulated. The carrier is removed. A first insulating layer is formed over the pre-applied protective layer and contact pads. Vias are formed in the first insulating layer and pre-applied protective layer to expose interconnect sites on the semiconductor die. An interconnect structure is formed over the first insulating layer in electrical contact with the interconnect sites on the semiconductor die and contact pads. The interconnect structure has a redistribution layer formed on the first insulating layer, a second insulating layer formed on the redistribution layer, and an under bump metallization layer formed over the second dielectric in electrical contact with the redistribution layer.




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Enhanced patterning uniformity of gate electrodes of a semiconductor device by late gate doping

When forming sophisticated semiconductor-based gate electrode structures of transistors, the pre-doping of one type of gate electrode structure may be accomplished after the actual patterning of the electrode material by using an appropriate mask or fill material for covering the active regions and using a lithography mask. In this manner, a high degree of flexibility is provided with respect to selecting an appropriate patterning regime, while at the same time a uniform and superior cross-sectional shape for any type of gate electrode structure is obtained.




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Semiconductor device and method for manufacturing semiconductor device

A highly reliable semiconductor device is manufactured by giving stable electric characteristics to a transistor in which an oxide semiconductor film is used for a channel. An oxide semiconductor film which can have a first crystal structure by heat treatment and an oxide semiconductor film which can have a second crystal structure by heat treatment are formed so as to be stacked, and then heat treatment is performed; accordingly, crystal growth occurs with the use of an oxide semiconductor film having the second crystal structure as a seed, so that an oxide semiconductor film having the first crystal structure is formed. An oxide semiconductor film formed in this manner is used for an active layer of the transistor.




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Protective film of polarizer, polarizer and method for producing it, and liquid crystal display device

A protective film to a polarizer including a cellulose acylate and satisfying the following requirement (1) or (2): (1): The surface of the film has a pH of from 3.0 to 4.5.(2): The surface of the film has a pH of more than 4.5 and at most 6.0, and the film has a moisture permeability of at least 2800 g/m2·day.




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Imaging and display system for vehicle

A vehicular imaging and display system includes a rear backup camera at a rear portion of a vehicle, a video processor for processing image data captured by the rear camera, and a video display screen responsive to the video processor to display video images. During a reversing maneuver of the equipped vehicle, the video display screen displays video images captured by the rear camera. During forward travel of the equipped vehicle, the video display screen is operable to display images representative of a portion of the field of view of the rear camera to display images representative of an area sideward of the equipped vehicle responsive to at least one of (a) actuation of a turn signal indicator of the vehicle, (b) detection of a vehicle in a side lane adjacent to the equipped vehicle and (c) a lane departure warning system of the vehicle.




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Back plate component having reflective sheet reinforcing structure and liquid crystal display device including the same

Provided is a back plate component having reflective sheet reinforcing structure. The back plate component includes: a frame, a reflective sheet and a plurality of supporting film sheets. The frame includes a plurality of lateral beams and vertical beams, and at least one hollow part is included between the lateral beams and the vertical beams. The reflective sheet is attached to the frame, and includes a reflective surface and a back surface corresponding to the reflective surface. A portion of the back surface covers the whole hollow part. The plurality of supporting film sheets is attached to the back surface at a region corresponding to the hollow part, and includes a material the same as that of the reflective sheet. A liquid crystal display device is further disclosed herein.




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Optical compensated bending mode liquid crystal display panel and method for manufacturing the same

The present invention provides an optical compensated bending (OCB) mode liquid crystal display (LCD) panel and a method for manufacturing the same. The method comprises the following steps: forming alignment layers on substrate, respectively; forming a liquid crystal layer between the alignment layers to form a liquid crystal cell; applying an electrical signal across the liquid crystal cell; and irradiating light rays to or heating the liquid crystal cell, so as to form a first polymer alignment layer and a second polymer alignment layer, respectively. The present invention can reduce a phase transition time of liquid crystal molecules from a splay state to a bent state.




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Counter substrate for liquid crystal display and liquid crystal display device

A counter substrate for liquid crystal display includes a transparent substrate, a black matrix, and stripe transparent electrodes. The black matrix divides a plane surface of the transparent substrate into pixel or sub-pixel unit to form a light-shielded area and openings above the plane surface. The stripe transparent electrodes are formed into the pixel unit or the sub-pixel unit above the plane surface. The black matrix includes a frame pattern including two sides facing each other in parallel in the pixel or the sub-pixel unit, and a linear central pattern which is parallel to the two sides of the frame pattern and is formed at a midsection of the pixel or the sub-pixel unit. The transparent electrodes are each parallel to the two sides of the frame pattern and the central pattern and are located symmetrically to the central pattern.




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Tape substrate for chip on film structure of liquid crystal panel

The present invention discloses a tape substrate for chip on film structure of a liquid crystal panel. The tape substrate is provided with plural package units of chip on film structures arranged along its longitudinal direction, and the package unit has a driver chip, input leads and output leads. The longitudinal direction of the driver chip is parallel to the longitudinal direction of the tape substrate, and the input leads and the output leads are located at the two opposite sides of the driver chip. Each package unit is set up with a short side and a long side, and the input leads are formed at the short side, while the output leads are formed at the long side. In the package units adjacent to each other, the short side of one package unit joins the long side of a next package unit. This invention further discloses a liquid crystal panel having the tape substrate.




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Pixel electrode panel, a liquid crystal display panel assembly and methods for manufacturing the same

A liquid crystal display panel, including: a pixel electrode formed on a first substrate; an alignment layer formed on the pixel electrode, wherein the alignment layer includes an alignment layer material and aligns first liquid crystal molecules in a direction substantially perpendicular to the pixel electrode; and a photo hardening layer formed on the alignment layer, wherein the photo hardening layer includes a photo hardening layer material and aligns second liquid crystal molecules to be tilted with respect to the pixel electrode, wherein the alignment layer material and the photo hardening layer material have different polarities from each other.




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Multi-twist retarders for broadband polarization transformation and related fabrication methods

An optical element includes at least two stacked birefringent layers having respective local optical axes that are rotated by respective twist angles over respective thicknesses of the at least two layers, and are aligned along respective interfaces between the at least two layers. The respective twist angles and/or the respective thicknesses are different. The at least two stacked birefringent layers may be liquid crystal polymer optical retarder layers. Related devices and fabrication methods are also discussed.




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Plasmid vector, method for detecting gene promoter activity, and assay kit

According to one embodiment, a first gene encodes a reporter protein. The first gene is disposed at the downstream of the gene promoter. A second gene is disposed at the downstream of the gene promoter and encodes a replication origin-binding protein. An internal ribosome entry site is disposed between the first gene and the second gene. The transcription termination signal sequence encodes a signal for terminating the transcription of the first gene and the second gene. A replication origin sequence is recognized by the replication origin-binding protein.




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Separator device, deposition device and system for handling of somatic plant embryos

Methods and devices for separating fluid-suspended plant somatic embryos and embryogenic tissue based on differences in their fluid drag properties are disclosed. Deposition method and device for depositing plant somatic embryos into embryo receiver comprising growth substrate by means of a fluid jet is disclosed. An automated system for processing plant somatic embryos from the bioreactor to the growth substrate is also disclosed.




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Multi-channel system and methods for sorting particles

A multi-channel system and methods for sorting particles according to one or more characteristics of the particles. The system includes multiple flow cytometry units, each unit can have a nozzle for producing a fluid stream containing a desired population of particles in a mixture of particles. Each of the units may be operable to sort said desired population of particles by interrogating the fluid stream with a beam of electromagnetic radiation and classifying particles based on one or more characteristics of the particles. The system also includes a common fluid delivery system for delivering sheath fluid to each flow cytometer unit for producing respective fluid streams.




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General composition framework for ligand-controlled RNA regulatory systems

The invention provides an improved design for the construction of extensible nucleic acid-based, ligand-controlled regulatory systems, and the nucleic acid regulatory systems resulting therefrom. The invention contemplates improving the design of the switches (ligand-controlled regulatory systems) through the design of an information transmission domain (ITD). The improved ITD eliminates free-floating ends of the switching and the competing strands, and localizes competitive hybridization events to a contiguous strand of competing and switching strands in a strand-displacement mechanism-based switch, thereby improving the kinetics of strand-displacement. The improved regulatory systems have many uses in various biological systems, including gene expression control or ligand-concentration sensing.




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Methods and compositions for modulating tau levels

Methods and agents for reducing a level of an acetylated Tau polypeptide in a cell are provided. Methods for treating a tauopathy in an individual are also provided. Also provided is a method for diagnosing a cognitive impairment disorder in an individual. Methods for identifying an agent suitable for treating a tauopathy are also provided.




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Materials and methods for preparing protein-polymer conjugates

The invention is directed to a single-step method for rapidly and efficiently preparing protein-polymer conjugates, including an insulin-polymer conjugate. According to the method of the present invention, a protein and hydrophilic polymer are contacted in the presence of at least one organic solvent and at least one metal chelator, under conditions that promote the formation of a conjugate of the protein and polymer. Thus, the invention is directed to the site-specific modification of selected proteins, such as insulin, with poly(ethylene glycol) at residue PheB1. The invention also provides a pharmaceutical formulation for encapsulating the conjugate in a biodegradable polymer.




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Devices and methods for reducing matrix effects

Devices and methods are provided for reducing matrix effects in protein precipitated bioanalytical samples comprising: a support, and a sorbent associated with the support capable of binding matrix interfering agents present in the bioanalytical sample, wherein the device further comprises filtering means for removing precipitated protein particles. The filtering means is a size exclusion filter or a polymeric or inorganic monolith having a maximum pore size less than or equal to the diameter of the particles to be removed from the sample, and can be integral with the sorbent or associated with the sorbent. The sorbent is characterized by sufficient selectivity between the matrix interfering agents and analytes of interest to provide retention of the matrix interfering agents while providing elution of the analytes of interest (e.g., a reversed phase or a polar modified reversed phase). Typical devices incorporating these features include luer syringe filters, individual filter cartridges, multiwell plates, pipette tips, or inline columns for multiple or single use.




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Compositions and methods for enhancing resistance to northern leaf blight in maize

The invention relates to methods and compositions for identifying and selecting maize plants with enhanced resistance to northern leaf blight. Maize plants generated by the methods of the invention are also a feature of the invention.




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Recombinant DNA constructs encoding ribonuclease cleavage blockers and methods for modulating expression of a target gene

This invention provides recombinant DNA constructs and methods for manipulating expression of a target gene that is regulated by a small RNA, by interfering with the binding of the small RNA to its target gene. More specifically, this invention discloses recombinant DNA constructs encoding cleavage blockers, 5-modified cleavage blockers, and translational inhibitors useful for modulating expression of a target gene and methods for their use. Further disclosed are miRNA targets useful for designing recombinant DNA constructs including miRNA-unresponsive transgenes, miRNA decoys, cleavage blockers, 5-modified cleavage blockers, and translational inhibitors, as well as methods for their use, and transgenic eukaryotic cells and organisms containing such constructs.




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Compositions for diagnosis and therapy of diseases associated with aberrant expression of futrins (R-spondins) and/or Wnt

The present invention relates to a composition useful for the diagnosis of diseases associated with aberrant expression of the genes encoding the secreted proteins Futrin 1, 2, 3 and/or 4(=R-Spondin 2, 3, 1 and 4, respectively), e.g. in connection with tumors or diseases of the muscle, kidneys or bones. The present invention also relates to a pharmaceutical composition containing a compound which is capable of modifying (a) the expression of the gene encoding Futrin 1, 2, 3 and/or 4 or (b) the activity of the Futrin 1, 2, 3 and/or 4 protein.




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Methods and systems for manipulating particles using a fluidized bed

The present invention comprises methods and systems for manipulation of media and particles, whether inert materials or biomaterials, such as cells in suspension cell culture. The methods and systems comprise use of an apparatus comprising a rotating chamber wherein the actions of the combined forces fluid flow force and centrifugal force form a fluidized bed within the rotating chamber.




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Method for detecting the presence of a nucleic acid in a sample

An automated method for detecting the presence of a nucleic acid in a sample, where the method is performed within a housing of a self-contained, stand-alone analyzer. The method includes purifying the nucleic acid after it has been immobilized on a magnetically-responsive solid support. A pipette of the analyzer is used to form a reaction mixture comprising the purified nucleic acid and all reagents required to perform a nucleic acid amplification. Amplification products are synthesized that include a nucleotide sequence contained in the nucleic acid or the complement of the nucleic acid. The amplification products are exposed to a probe in a mixture, where the probe forms a hybrid with one of the amplification products. The formation of the hybrid in the mixture provides an indication of the presence of the nucleic acid in the sample.




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Method for producing sialic-acid-containing sugar chain

[Problem to be Solved] The importance of sugar chains having α2,3- or α2,6-linked sialic acid at their non-reducing ends is known. Industrial production has been demanded for these sugar chain compounds. Particularly, the production of glycoprotein drugs or the like inevitably requires producing in quantity sugar chains having homogeneous structures by controlling the linking pattern (α2,6-linkage or α2,3-linkage) of sialic acid. Particularly, a triantennary or tetraantennary N-type complex sugar chain having sialic acid at each of all non-reducing ends is generally considered difficult to chemically synthesize. There has been no report disclosing that such a sugar chain was chemically synthesized. Furthermore, these sugar chains are also difficult to efficiently prepare enzymatically.[Solution]The present inventors have newly found the activity of sialyltransferase of degrading sialic acid on a reaction product in the presence of CMP and also found that formed CMP can be degraded enzymatically to thereby efficiently produce a sialic acid-containing sugar chain. The present inventors have further found that even a tetraantennary N-type sugar chain having four α2,6-linked sialic acid molecules, which has previously been difficult to synthesize, can be prepared at high yields by one-pot synthesis comprising the elongation reaction of a biantennary sugar chain used as a starting material without performing purification after each enzymatic reaction.




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Fitting for a vehicle seat

A fitting for a vehicle seat is disclosed, in particular for a motor vehicle seat. First and second fitting parts are geared with one another via a meshing gearwheel and gear rim. A peripheral eccentric is driven by a drive element for driving a relative rolling movement of the gearwheel and the gear rim, and the first fitting part receives the eccentric which is supported on the second fitting part. A blocking element blocks the eccentric in the non-driven state of the fitting via toothing on the first fitting part, and releases the eccentric when driven. The gear rim is formed on the first fitting part and the gearwheel is formed on the second fitting part.




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Fitting for a vehicle seat

In a fitting for a vehicle seat, a catch assembly has a pivot axis, and the catch assembly has a catch and a lever which can be pivoted relative to one another about an axis spaced from the pivot axis. The catch has a hook-like contour and in the pivoted-out position of the backrest engages with a catch locking element for locking in a punctiform or linear contact region. The catch cooperates with a spring. The lever is mounted pivotably about the pivot axis and the lever rotatably mounts the catch. In the unloaded pivoted-out position, the perpendicular in the contact region runs on one side of the pivot axis or through the pivot axis. When a return pivoting force is imposed on the backrest in the pivoted-out position, the perpendicular in the contact region runs on the opposing side of or outside of the pivot axis.




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Seat cushion, for instance for an aircraft seat, and a method for manufacturing such a seat cushion

A seat cushion, in particular for an aircraft seat, the seat cushion comprising a seat part having a receiving surface adapted to receive a person and a reinforcing part supporting the seat part, wherein at least the reinforcing part contains expanded polypropylene (EPP), preferably comprising fire retardant properties. The invention further relates to a method for manufacturing such a seat cushion, a seat comprising such a seat cushion and a vehicle comprising such a seat.




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Operating unit for installation in an aircraft cabin

An operating unit (1) for installation in an aircraft cabin comprises an operating unit front side (10) and an operating unit rear side (20), at least one operating element (12, 14) attached in the region of the operating unit front side (10) and accessible to a user, and a holding device (40) for attaching the operating unit (1) to a monument (30) accommodating the operating unit (1) in its state mounted in the aircraft cabin. The holding device (40) is designed to attach the operating unit (1) in its state mounted in the aircraft cabin to the monument (30), in a first position or in a second position, as desired, the operating element (12, 14) in the second position of the operating unit (1) being situated in a spatial position which is lowered with respect to the spatial position of the operating element (12, 14) in the first position of the operating unit (1) and/or is displaced in a direction parallel to an imaginary straight line connecting the operating unit rear side (20) to the operating unit front side (10).